nco_ip.fit.summary

大量VHDL写的数字系统设计有用实例达到

Fitter Status : Successful - Sun Apr 29 10:21:36 2007
Quartus II Version : 7.0 Build 33 02/05/2007 SJ Full Version
Revision Name : NCO_ip
Top-level Entity Name : nco_ip
Family : Stratix II
Device : EP2S15F484C3
Timing Models : Final
Logic utilization : 4 %
    Combinational ALUTs : 317 / 12,480 ( 3 % )
    Dedicated logic registers : 386 / 12,480 ( 3 % )
Total registers : 386
Total pins : 61 / 343 ( 18 % )
Total virtual pins : 0
Total block memory bits : 2,304 / 419,328 ( < 1 % )
DSP block 9-bit elements : 0 / 96 ( 0 % )
Total PLLs : 0 / 6 ( 0 % )
Total DLLs : 0 / 2 ( 0 % )