phase_shift_sin.map.qmsg

来自「实现低频率的移相信号发生器,才用DDS技术直接的合成」· QMSG 代码 · 共 62 行 · 第 1/4 页

QMSG
62
字号
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus51/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus51/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" {  } { { "altshift.tdf" "" { Text "d:/altera/quartus51/libraries/megafunctions/altshift.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altshift adder32:u1\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs " "Info: Elaborating entity \"altshift\" for hierarchy \"adder32:u1\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs\"" {  } { { "lpm_add_sub.tdf" "result_ext_latency_ffs" { Text "d:/altera/quartus51/libraries/megafunctions/lpm_add_sub.tdf" 284 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altshift adder32:u1\|lpm_add_sub:lpm_add_sub_component\|altshift:carry_ext_latency_ffs " "Info: Elaborating entity \"altshift\" for hierarchy \"adder32:u1\|lpm_add_sub:lpm_add_sub_component\|altshift:carry_ext_latency_ffs\"" {  } { { "lpm_add_sub.tdf" "carry_ext_latency_ffs" { Text "d:/altera/quartus51/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "adder8 adder8:u2 " "Info: Elaborating entity \"adder8\" for hierarchy \"adder8:u2\"" {  } { { "phase_shift_sin.vhd" "u2" { Text "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.vhd" 55 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_add_sub adder8:u2\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborating entity \"lpm_add_sub\" for hierarchy \"adder8:u2\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "adder8.vhd" "lpm_add_sub_component" { Text "E:/老项目/数字移相信号发生器/fpga/adder8.vhd" 78 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "addcore adder8:u2\|lpm_add_sub:lpm_add_sub_component\|addcore:adder " "Info: Elaborating entity \"addcore\" for hierarchy \"adder8:u2\|lpm_add_sub:lpm_add_sub_component\|addcore:adder\"" {  } { { "lpm_add_sub.tdf" "adder" { Text "d:/altera/quartus51/libraries/megafunctions/lpm_add_sub.tdf" 266 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "a_csnbuffer adder8:u2\|lpm_add_sub:lpm_add_sub_component\|addcore:adder\|a_csnbuffer:oflow_node " "Info: Elaborating entity \"a_csnbuffer\" for hierarchy \"adder8:u2\|lpm_add_sub:lpm_add_sub_component\|addcore:adder\|a_csnbuffer:oflow_node\"" {  } { { "addcore.tdf" "oflow_node" { Text "d:/altera/quartus51/libraries/megafunctions/addcore.tdf" 94 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "a_csnbuffer adder8:u2\|lpm_add_sub:lpm_add_sub_component\|addcore:adder\|a_csnbuffer:result_node " "Info: Elaborating entity \"a_csnbuffer\" for hierarchy \"adder8:u2\|lpm_add_sub:lpm_add_sub_component\|addcore:adder\|a_csnbuffer:result_node\"" {  } { { "addcore.tdf" "result_node" { Text "d:/altera/quartus51/libraries/megafunctions/addcore.tdf" 120 6 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altshift adder8:u2\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs " "Info: Elaborating entity \"altshift\" for hierarchy \"adder8:u2\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs\"" {  } { { "lpm_add_sub.tdf" "result_ext_latency_ffs" { Text "d:/altera/quartus51/libraries/megafunctions/lpm_add_sub.tdf" 284 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sin_rom sin_rom:u3 " "Info: Elaborating entity \"sin_rom\" for hierarchy \"sin_rom:u3\"" {  } { { "phase_shift_sin.vhd" "u3" { Text "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.vhd" 56 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus51/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "d:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" 425 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram sin_rom:u3\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"sin_rom:u3\|altsyncram:altsyncram_component\"" {  } { { "sin_rom.vhd" "altsyncram_component" { Text "E:/老项目/数字移相信号发生器/fpga/sin_rom.vhd" 86 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_66u.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_66u.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_66u " "Info: Found entity 1: altsyncram_66u" {  } { { "db/altsyncram_66u.tdf" "" { Text "E:/老项目/数字移相信号发生器/fpga/db/altsyncram_66u.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_66u sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_66u:auto_generated " "Info: Elaborating entity \"altsyncram_66u\" for hierarchy \"sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_66u:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "d:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" 903 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_4r92.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_4r92.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_4r92 " "Info: Found entity 1: altsyncram_4r92" {  } { { "db/altsyncram_4r92.tdf" "" { Text "E:/老项目/数字移相信号发生器/fpga/db/altsyncram_4r92.tdf" 36 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_4r92 sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_66u:auto_generated\|altsyncram_4r92:altsyncram1 " "Info: Elaborating entity \"altsyncram_4r92\" for hierarchy \"sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_66u:auto_generated\|altsyncram_4r92:altsyncram1\"" {  } { { "db/altsyncram_66u.tdf" "altsyncram1" { Text "E:/老项目/数字移相信号发生器/fpga/db/altsyncram_66u.tdf" 34 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?