top.twr

用VHDL语言开发的一个16位的具有5级流水线的CPU设计

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Release 9.1i Trace 
Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.

E:\Xilinx91i\bin\nt\trce.exe -ise F:/project/CPU16/CPU16.ise -intstyle ise -e 3
-s 6 -xml top top.ncd -o top.twr top.pcf

Design file:              top.ncd
Physical constraint file: top.pcf
Device,package,speed:     xc2s150,pq208,-6 (PRODUCTION 1.27 2006-10-19)
Report level:             error report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
--------------------------------------------------------------------------------

INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths 
   option. All paths that are not constrained will be reported in the 
   unconstrained paths section(s) of the report.
INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on 
   a 50 Ohm transmission line loading model.  For the details of this model, 
   and for more information on accounting for different loading conditions, 
   please see the device datasheet.



Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Clock CLK to Pad
------------+------------+------------------+--------+
            | clk (edge) |                  | Clock  |
Destination |   to PAD   |Internal Clock(s) | Phase  |
------------+------------+------------------+--------+
MCLK        |    8.081(F)|CLK_BUFGP         |   0.000|
------------+------------+------------------+--------+

Clock to Setup on destination clock CLK
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
CLK            |         |         |         |    2.590|
---------------+---------+---------+---------+---------+

Pad to Pad
---------------+---------------+---------+
Source Pad     |Destination Pad|  Delay  |
---------------+---------------+---------+
KRIX           |CI<15>         |    7.192|
MUX<0>         |CI<14>         |    7.958|
MUX<0>         |CI<15>         |    7.561|
MUX<0>         |CI<16>         |    9.119|
MUX<0>         |CI<17>         |    8.042|
MUX<0>         |CI<18>         |    7.926|
MUX<0>         |CI<19>         |    9.216|
MUX<0>         |CI<20>         |    8.970|
MUX<0>         |CI<21>         |    8.799|
MUX<0>         |CI<22>         |    9.067|
MUX<0>         |CI<23>         |    8.955|
MUX<0>         |CI<24>         |    7.802|
MUX<0>         |CI<25>         |    9.277|
MUX<0>         |CI<26>         |    7.806|
MUX<0>         |CI<27>         |    9.104|
MUX<0>         |CI<28>         |    9.438|
MUX<0>         |CI<29>         |    8.399|
MUX<0>         |CI<30>         |    8.269|
MUX<0>         |CI<31>         |    8.269|
MUX<1>         |CI<0>          |    9.114|
MUX<1>         |CI<1>          |    8.372|
MUX<1>         |CI<2>          |    8.197|
MUX<1>         |CI<3>          |    8.083|
MUX<1>         |CI<4>          |    8.141|
MUX<1>         |CI<5>          |    9.238|
MUX<1>         |CI<6>          |    9.078|
MUX<1>         |CI<7>          |    8.150|
MUX<1>         |CI<8>          |    8.373|
MUX<1>         |CI<9>          |    7.629|
MUX<1>         |CI<10>         |    8.812|
MUX<1>         |CI<11>         |    8.287|
MUX<1>         |CI<12>         |    8.150|
MUX<1>         |CI<13>         |    8.163|
MUX<1>         |CI<14>         |    7.485|
MUX<1>         |CI<15>         |    8.120|
MUX<1>         |CI<16>         |    9.732|
MUX<1>         |CI<17>         |    8.655|
MUX<1>         |CI<18>         |    8.539|
MUX<1>         |CI<19>         |    9.829|
MUX<1>         |CI<20>         |    9.583|
MUX<1>         |CI<21>         |    9.412|
MUX<1>         |CI<22>         |    9.680|
MUX<1>         |CI<23>         |    9.568|
MUX<1>         |CI<24>         |    8.415|
MUX<1>         |CI<25>         |    9.890|
MUX<1>         |CI<26>         |    8.419|
MUX<1>         |CI<27>         |    9.717|
MUX<1>         |CI<28>         |   10.051|
MUX<1>         |CI<29>         |    9.012|
MUX<1>         |CI<30>         |    8.882|
MUX<1>         |CI<31>         |    8.882|
MUX<2>         |CI<0>          |    9.847|
MUX<2>         |CI<1>          |    9.105|
MUX<2>         |CI<2>          |    8.930|
MUX<2>         |CI<3>          |    8.816|
MUX<2>         |CI<4>          |    8.874|
MUX<2>         |CI<5>          |    9.971|
MUX<2>         |CI<6>          |    9.811|
MUX<2>         |CI<7>          |    8.883|
MUX<2>         |CI<8>          |    9.106|
MUX<2>         |CI<9>          |    8.362|
MUX<2>         |CI<10>         |    9.545|
MUX<2>         |CI<11>         |    9.020|
MUX<2>         |CI<12>         |    8.883|
MUX<2>         |CI<13>         |    8.896|
MUX<2>         |CI<14>         |    8.012|
MUX<2>         |CI<15>         |    7.907|
MUX<2>         |CI<16>         |    9.147|
MUX<2>         |CI<17>         |    8.070|
MUX<2>         |CI<18>         |    7.954|
MUX<2>         |CI<19>         |    9.244|
MUX<2>         |CI<20>         |    8.998|
MUX<2>         |CI<21>         |    8.827|
MUX<2>         |CI<22>         |    9.095|
MUX<2>         |CI<23>         |    8.983|
MUX<2>         |CI<24>         |    7.830|
MUX<2>         |CI<25>         |    9.305|
MUX<2>         |CI<26>         |    7.834|
MUX<2>         |CI<27>         |    9.132|
MUX<2>         |CI<28>         |    9.466|
MUX<2>         |CI<29>         |    8.427|
MUX<2>         |CI<30>         |    8.297|
MUX<2>         |CI<31>         |    8.297|
PRIX           |CI<14>         |    7.312|
---------------+---------------+---------+


Analysis completed Wed May 07 00:27:11 2008
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Trace Settings:
-------------------------
Trace Settings 

Peak Memory Usage: 81 MB