adc.map.qmsg

来自「用verilog编程实现的基于FPGA的AD数据采集程序」· QMSG 代码 · 共 189 行 · 第 1/5 页

{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst8\|data_out\[5\] " "Warning: No clock transition on register \"adc_3:inst8\|data_out\[5\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst8\|data_out\[5\] clock_enable GND " "Warning: Reduced register \"adc_3:inst8\|data_out\[5\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst8\|data_out\[4\] " "Warning: No clock transition on register \"adc_3:inst8\|data_out\[4\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst8\|data_out\[4\] clock_enable GND " "Warning: Reduced register \"adc_3:inst8\|data_out\[4\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst8\|data_out\[3\] " "Warning: No clock transition on register \"adc_3:inst8\|data_out\[3\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst8\|data_out\[3\] clock_enable GND " "Warning: Reduced register \"adc_3:inst8\|data_out\[3\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst8\|data_out\[2\] " "Warning: No clock transition on register \"adc_3:inst8\|data_out\[2\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst8\|data_out\[2\] clock_enable GND " "Warning: Reduced register \"adc_3:inst8\|data_out\[2\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst8\|data_out\[1\] " "Warning: No clock transition on register \"adc_3:inst8\|data_out\[1\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst8\|data_out\[1\] clock_enable GND " "Warning: Reduced register \"adc_3:inst8\|data_out\[1\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst8\|data_out\[0\] " "Warning: No clock transition on register \"adc_3:inst8\|data_out\[0\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst8\|data_out\[0\] clock_enable GND " "Warning: Reduced register \"adc_3:inst8\|data_out\[0\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[11\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[11\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[11\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[11\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[10\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[10\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[10\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[10\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[9\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[9\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[9\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[9\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[8\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[8\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[8\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[8\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[7\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[7\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[7\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[7\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[6\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[6\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[6\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[6\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[5\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[5\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[5\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[5\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[4\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[4\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[4\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[4\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[3\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[3\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[3\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[3\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[2\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[2\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[2\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[2\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[1\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[1\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[1\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[1\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "adc_3:inst9\|data_out\[0\] " "Warning: No clock transition on register \"adc_3:inst9\|data_out\[0\]\" due to stuck clock or clock enable" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adc_3:inst9\|data_out\[0\] clock_enable GND " "Warning: Reduced register \"adc_3:inst9\|data_out\[0\]\" with stuck clock_enable port to stuck value GND" {  } { { "../adc_3/adc_3.v" "" { Text "D:/altera/qdesigns50/zdx/ADC模块_r/adc_3/adc_3.v" 5 -1 0 } }  } 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "add_out1\[2\] GND " "Warning: Pin \"add_out1\[2\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { 32 576 752 48 "add_out1\[2..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "add_out1\[1\] GND " "Warning: Pin \"add_out1\[1\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { 32 576 752 48 "add_out1\[2..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "add_out1\[0\] GND " "Warning: Pin \"add_out1\[0\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { 32 576 752 48 "add_out1\[2..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[11\] GND " "Warning: Pin \"data_out2\[11\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[10\] GND " "Warning: Pin \"data_out2\[10\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[9\] GND " "Warning: Pin \"data_out2\[9\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[8\] GND " "Warning: Pin \"data_out2\[8\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[7\] GND " "Warning: Pin \"data_out2\[7\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[6\] GND " "Warning: Pin \"data_out2\[6\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[5\] GND " "Warning: Pin \"data_out2\[5\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[4\] GND " "Warning: Pin \"data_out2\[4\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[3\] GND " "Warning: Pin \"data_out2\[3\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[2\] GND " "Warning: Pin \"data_out2\[2\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[1\] GND " "Warning: Pin \"data_out2\[1\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out2\[0\] GND " "Warning: Pin \"data_out2\[0\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -144 1072 1248 -128 "data_out2\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[11\] GND " "Warning: Pin \"data_out3\[11\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[10\] GND " "Warning: Pin \"data_out3\[10\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[9\] GND " "Warning: Pin \"data_out3\[9\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[8\] GND " "Warning: Pin \"data_out3\[8\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[7\] GND " "Warning: Pin \"data_out3\[7\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[6\] GND " "Warning: Pin \"data_out3\[6\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[5\] GND " "Warning: Pin \"data_out3\[5\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[4\] GND " "Warning: Pin \"data_out3\[4\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[3\] GND " "Warning: Pin \"data_out3\[3\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[2\] GND " "Warning: Pin \"data_out3\[2\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[1\] GND " "Warning: Pin \"data_out3\[1\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out3\[0\] GND " "Warning: Pin \"data_out3\[0\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { -48 1072 1248 -32 "data_out3\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out4\[11\] GND " "Warning: Pin \"data_out4\[11\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { 48 1072 1248 64 "data_out4\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out4\[10\] GND " "Warning: Pin \"data_out4\[10\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { 48 1072 1248 64 "data_out4\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out4\[9\] GND " "Warning: Pin \"data_out4\[9\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { 48 1072 1248 64 "data_out4\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out4\[8\] GND " "Warning: Pin \"data_out4\[8\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { 48 1072 1248 64 "data_out4\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out4\[7\] GND " "Warning: Pin \"data_out4\[7\]\" stuck at GND" {  } { { "../adc_4/adc.bdf" "" { Schematic "D:/altera/qdesigns50/zdx/ADC模块_r/adc_4/adc.bdf" { { 48 1072 1248 64 "data_out4\[11..0\]" "" } } } }  } 0} { "Warning" "WOPT_MLS_STUCK_PIN" "data_out4\[6\] GND " "Warnin