adc.vwf

来自「用verilog编程实现的基于FPGA的AD数据采集程序」· VWF 代码 · 共 3,528 行 · 第 1/4 页

VWF
3,528 行
字号
1234
SIGNAL("data_out6[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out6";
}

SIGNAL("data_out6[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out6";
}

SIGNAL("data_out6[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out6";
}

SIGNAL("data_out6[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out6";
}

SIGNAL("data_out6[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out6";
}

SIGNAL("data_out6[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out6";
}

SIGNAL("data_out6[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out6";
}

SIGNAL("data_out6[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out6";
}

SIGNAL("data_out6[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out6";
}

SIGNAL("data_out7")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 12;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("data_out7[11]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out7[10]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out7[9]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out7[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out7[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out7[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out7[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out7[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out7[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out7[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out7[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out7[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out7";
}

SIGNAL("data_out8")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 12;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("data_out8[11]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("data_out8[10]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("data_out8[9]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("data_out8[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("data_out8[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("data_out8[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("data_out8[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("data_out8[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("data_out8[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("data_out8[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("data_out8[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("data_out8[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "data_out8";
}

SIGNAL("reset")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

TRANSITION_LIST("ad_sts")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 270.0;
		LEVEL 1 FOR 980.0;
		LEVEL 0 FOR 120.0;
		LEVEL 1 FOR 1060.0;
		LEVEL 0 FOR 125.0;
		LEVEL 1 FOR 1070.0;
		LEVEL 0 FOR 140.0;
		LEVEL 1 FOR 1020.0;
		LEVEL 0 FOR 225.0;
		LEVEL 1 FOR 1010.0;
		LEVEL 0 FOR 93980.0;
	}
}

TRANSITION_LIST("clk")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 833;
			LEVEL 0 FOR 60.0;
			LEVEL 1 FOR 60.0;
		}
		LEVEL 0 FOR 40.0;
	}
}

TRANSITION_LIST("control")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_in[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1150.0;
		LEVEL 1 FOR 200.0;
		LEVEL 0 FOR 2165.0;
		LEVEL 1 FOR 190.0;
		LEVEL 0 FOR 96295.0;
	}
}

TRANSITION_LIST("data_in[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 5965.0;
		LEVEL 1 FOR 170.0;
		LEVEL 0 FOR 93865.0;
	}
}

TRANSITION_LIST("data_in[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 5965.0;
		LEVEL 1 FOR 170.0;
		LEVEL 0 FOR 93865.0;
	}
}

TRANSITION_LIST("data_in[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 2290.0;
		LEVEL 1 FOR 240.0;
		LEVEL 0 FOR 97470.0;
	}
}

TRANSITION_LIST("data_in[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1150.0;
		LEVEL 1 FOR 200.0;
		LEVEL 0 FOR 940.0;
		LEVEL 1 FOR 240.0;
		LEVEL 0 FOR 985.0;
		LEVEL 1 FOR 190.0;
		LEVEL 0 FOR 96295.0;
	}
}

TRANSITION_LIST("data_in[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 2290.0;
		LEVEL 1 FOR 240.0;
		LEVEL 0 FOR 985.0;
		LEVEL 1 FOR 190.0;
		LEVEL 0 FOR 96295.0;
	}
}

TRANSITION_LIST("data_in[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1150.0;
		LEVEL 1 FOR 200.0;
		LEVEL 0 FOR 2165.0;
		LEVEL 1 FOR 190.0;
		LEVEL 0 FOR 96295.0;
	}
}

TRANSITION_LIST("data_in[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 100000.0;
	}
}

TRANSITION_LIST("data_in[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1150.0;
		LEVEL 1 FOR 200.0;
		LEVEL 0 FOR 4615.0;
		LEVEL 1 FOR 170.0;
		LEVEL 0 FOR 93865.0;
	}
}

TRANSITION_LIST("data_in[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1150.0;
		LEVEL 1 FOR 200.0;
		LEVEL 0 FOR 940.0;
		LEVEL 1 FOR 240.0;
		LEVEL 0 FOR 985.0;
		LEVEL 1 FOR 190.0;
		LEVEL 0 FOR 2260.0;
		LEVEL 1 FOR 170.0;
		LEVEL 0 FOR 93865.0;
	}
}

TRANSITION_LIST("data_in[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 4700.0;
		LEVEL 1 FOR 165.0;
		LEVEL 0 FOR 95135.0;
	}
}

TRANSITION_LIST("data_in[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1150.0;
		LEVEL 1 FOR 200.0;
		LEVEL 0 FOR 940.0;
		LEVEL 1 FOR 240.0;
		LEVEL 0 FOR 985.0;
		LEVEL 1 FOR 190.0;
		LEVEL 0 FOR 995.0;
		LEVEL 1 FOR 165.0;
		LEVEL 0 FOR 1100.0;
		LEVEL 1 FOR 170.0;
		LEVEL 0 FOR 93865.0;
	}
}

TRANSITION_LIST("data_out1[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out1[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out1[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out1[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out1[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out1[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out1[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out1[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out1[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out1[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out1[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out1[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out2[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}

TRANSITION_LIST("data_out3[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 100000.0;
	}
}
1234

adc.vwf - 源码说明

本页面展示了「用verilog编程实现的基于FPGA的AD数据采集程序」中的 adc.vwf 源码文件，采用 VWF 编程语言编写，共 3,528 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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