dac.tan.rpt

来自「VHDL語言實驗數字鍾功能,可手動調時,設定閙鍾等」· RPT 代码 · 共 284 行 · 第 1/5 页

; N/A   ; 142.86 MHz ( period = 7.000 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[10] ; CLK        ; CLK      ; None                        ; None                      ; 5.900 ns                ;
; N/A   ; 142.86 MHz ( period = 7.000 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[9]  ; CLK        ; CLK      ; None                        ; None                      ; 5.900 ns                ;
; N/A   ; 142.86 MHz ( period = 7.000 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; CLK        ; CLK      ; None                        ; None                      ; 5.900 ns                ;
; N/A   ; 142.86 MHz ( period = 7.000 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[7]  ; CLK        ; CLK      ; None                        ; None                      ; 5.900 ns                ;
; N/A   ; 142.86 MHz ( period = 7.000 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[6]  ; CLK        ; CLK      ; None                        ; None                      ; 5.900 ns                ;
; N/A   ; 142.86 MHz ( period = 7.000 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[5]  ; CLK        ; CLK      ; None                        ; None                      ; 5.900 ns                ;
; N/A   ; 142.86 MHz ( period = 7.000 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[4]  ; CLK        ; CLK      ; None                        ; None                      ; 5.900 ns                ;
; N/A   ; 142.86 MHz ( period = 7.000 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3]  ; CLK        ; CLK      ; None                        ; None                      ; 5.900 ns                ;
; N/A   ; 142.86 MHz ( period = 7.000 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[2]  ; CLK        ; CLK      ; None                        ; None                      ; 5.900 ns                ;
; N/A   ; 142.86 MHz ( period = 7.000 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[1]  ; CLK        ; CLK      ; None                        ; None                      ; 5.900 ns                ;
; N/A   ; 142.86 MHz ( period = 7.000 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[0]  ; CLK        ; CLK      ; None                        ; None                      ; 5.900 ns                ;
; N/A   ; 147.06 MHz ( period = 6.800 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3]  ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.700 ns                ;
; N/A   ; 149.25 MHz ( period = 6.700 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[2]  ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.600 ns                ;
; N/A   ; 149.25 MHz ( period = 6.700 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[1]  ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.600 ns                ;
; N/A   ; 153.85 MHz ( period = 6.500 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[0]  ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.400 ns                ;
; N/A   ; 169.49 MHz ( period = 5.900 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[7]  ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.800 ns                ;
; N/A   ; 172.41 MHz ( period = 5.800 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[6]  ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.700 ns                ;
; N/A   ; 175.44 MHz ( period = 5.700 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[5]  ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.600 ns                ;
; N/A   ; 181.82 MHz ( period = 5.500 ns )               ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[4]  ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.400 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 3.800 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[10] ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 3.700 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[9]  ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 3.700 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[8]  ; FSS                                                            ; CLK        ; CLK      ; None                        ; None                      ; 3.500 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[5]        ; CLK        ; CLK      ; None                        ; None                      ; 1.800 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[1]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[5]        ; CLK        ; CLK      ; None                        ; None                      ; 1.600 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[4]        ; CLK        ; CLK      ; None                        ; None                      ; 1.600 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[3]        ; CLK        ; CLK      ; None                        ; None                      ; 1.400 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[2]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[5]        ; CLK        ; CLK      ; None                        ; None                      ; 1.400 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[1]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[4]        ; CLK        ; CLK      ; None                        ; None                      ; 1.400 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[2]        ; CLK        ; CLK      ; None                        ; None                      ; 1.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[1]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[3]        ; CLK        ; CLK      ; None                        ; None                      ; 1.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[3]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[5]        ; CLK        ; CLK      ; None                        ; None                      ; 1.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[2]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[4]        ; CLK        ; CLK      ; None                        ; None                      ; 1.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0]        ; CLK        ; CLK      ; None                        ; None                      ; 1.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[1]        ; CLK        ; CLK      ; None                        ; None                      ; 1.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[1]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[1]        ; CLK        ; CLK      ; None                        ; None                      ; 1.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[1]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[2]        ; CLK        ; CLK      ; None                        ; None                      ; 1.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[2]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[2]        ; CLK        ; CLK      ; None                        ; None                      ; 1.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[2]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[3]        ; CLK        ; CLK      ; None                        ; None                      ; 1.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[3]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[3]        ; CLK        ; CLK      ; None                        ; None                      ; 1.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[5]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[5]        ; CLK        ; CLK      ; None                        ; None                      ; 1.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[4]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[5]        ; CLK        ; CLK      ; None                        ; None                      ; 1.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[3]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[4]        ; CLK        ; CLK      ; None                        ; None                      ; 1.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[4]        ; lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[4]        ; CLK        ; CLK      ; None                        ; None                      ; 1.000 ns                ;
+-------+------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'CLK1'                                                                                                                                                                                                                                                                              ;
+-------+------------------------------------------------+--------------------------------------------------------------+--------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period)                           ; From                                                         ; To                                                           ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+------------------------------------------------+--------------------------------------------------------------+--------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0]  ; lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] ; CLK1       ; CLK1     ; None                        ; None                      ; 3.500 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0]  ; lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[10] ; CLK1       ; CLK1     ; None                        ; None                      ; 3.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[1]  ; lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] ; CLK1       ; CLK1     ; None                        ; None                      ; 3.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; lpm_counter:DATA2_rtl_2|alt_counter_f10ke