📄 dac.tan.qmsg
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{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "1 " "Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "FSS " "Info: Detected ripple clock \"FSS\" as buffer" { } { { "DAC.vhd" "" { Text "D:/0511034406/shiyan14/DAC.vhd" 12 -1 0 } } { "d:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "FSS" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} } { } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLK register lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] register lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[11\] 108.7 MHz 9.2 ns Internal " "Info: Clock \"CLK\" has Internal fmax of 108.7 MHz between source register \"lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]\" and destination register \"lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[11\]\" (period= 9.2 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.100 ns + Longest register register " "Info: + Longest register to register delay is 8.100 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] 1 REG LC6_C2 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC6_C2; Fanout = 3; REG Node = 'lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(1.100 ns) 2.000 ns Equal0~118 2 COMB LC6_C1 1 " "Info: 2: + IC(0.900 ns) + CELL(1.100 ns) = 2.000 ns; Loc. = LC6_C1; Fanout = 1; COMB Node = 'Equal0~118'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.000 ns" { lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] Equal0~118 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.000 ns) 3.000 ns Equal0~120 3 COMB LC7_C1 1 " "Info: 3: + IC(0.000 ns) + CELL(1.000 ns) = 3.000 ns; Loc. = LC7_C1; Fanout = 1; COMB Node = 'Equal0~120'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.000 ns" { Equal0~118 Equal0~120 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.600 ns) 4.600 ns Equal0~112 4 COMB LC8_C1 2 " "Info: 4: + IC(0.000 ns) + CELL(1.600 ns) = 4.600 ns; Loc. = LC8_C1; Fanout = 2; COMB Node = 'Equal0~112'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.600 ns" { Equal0~120 Equal0~112 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 6.300 ns Equal0~112\$wirecell 5 COMB LC3_C1 13 " "Info: 5: + IC(0.300 ns) + CELL(1.400 ns) = 6.300 ns; Loc. = LC3_C1; Fanout = 13; COMB Node = 'Equal0~112\$wirecell'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.700 ns" { Equal0~112 Equal0~112$wirecell } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(0.800 ns) 8.100 ns lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[11\] 6 REG LC6_C4 2 " "Info: 6: + IC(1.000 ns) + CELL(0.800 ns) = 8.100 ns; Loc. = LC6_C4; Fanout = 2; REG Node = 'lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[11\]'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { Equal0~112$wirecell lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.900 ns ( 72.84 % ) " "Info: Total cell delay = 5.900 ns ( 72.84 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.200 ns ( 27.16 % ) " "Info: Total interconnect delay = 2.200 ns ( 27.16 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.100 ns" { lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] Equal0~118 Equal0~120 Equal0~112 Equal0~112$wirecell lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "8.100 ns" { lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] Equal0~118 Equal0~120 Equal0~112 Equal0~112$wirecell lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } { 0.000ns 0.900ns 0.000ns 0.000ns 0.300ns 1.000ns } { 0.000ns 1.100ns 1.000ns 1.600ns 1.400ns 0.800ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 2.400 ns + Shortest register " "Info: + Shortest clock path from clock \"CLK\" to destination register is 2.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK 1 CLK PIN_126 14 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_126; Fanout = 14; CLK Node = 'CLK'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK } "NODE_NAME" } } { "DAC.vhd" "" { Text "D:/0511034406/shiyan14/DAC.vhd" 5 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.000 ns) 2.400 ns lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[11\] 2 REG LC6_C4 2 " "Info: 2: + IC(0.400 ns) + CELL(0.000 ns) = 2.400 ns; Loc. = LC6_C4; Fanout = 2; REG Node = 'lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[11\]'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.400 ns" { CLK lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.000 ns ( 83.33 % ) " "Info: Total cell delay = 2.000 ns ( 83.33 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.400 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.400 ns ( 16.67 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK CLK~out lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 2.400 ns - Longest register " "Info: - Longest clock path from clock \"CLK\" to source register is 2.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK 1 CLK PIN_126 14 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_126; Fanout = 14; CLK Node = 'CLK'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK } "NODE_NAME" } } { "DAC.vhd" "" { Text "D:/0511034406/shiyan14/DAC.vhd" 5 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.000 ns) 2.400 ns lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\] 2 REG LC6_C2 3 " "Info: 2: + IC(0.400 ns) + CELL(0.000 ns) = 2.400 ns; Loc. = LC6_C2; Fanout = 3; REG Node = 'lpm_counter:COUNT12_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[3\]'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.400 ns" { CLK lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.000 ns ( 83.33 % ) " "Info: Total cell delay = 2.000 ns ( 83.33 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.400 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.400 ns ( 16.67 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK CLK~out lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK CLK~out lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK CLK~out lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" { } { { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" { } { { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.100 ns" { lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] Equal0~118 Equal0~120 Equal0~112 Equal0~112$wirecell lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "8.100 ns" { lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] Equal0~118 Equal0~120 Equal0~112 Equal0~112$wirecell lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } { 0.000ns 0.900ns 0.000ns 0.000ns 0.300ns 1.000ns } { 0.000ns 1.100ns 1.000ns 1.600ns 1.400ns 0.800ns } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK CLK~out lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[11] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK CLK~out lpm_counter:COUNT12_rtl_1|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT_RESTRICTED" "CLK1 register register lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[0\] lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[11\] 200.0 MHz Internal " "Info: Clock \"CLK1\" Internal fmax is restricted to 200.0 MHz between source register \"lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[0\]\" and destination register \"lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[11\]\"" { { "Info" "ITDB_CLOCK_TCH_TCL" "2.5 ns 2.5 ns 5.0 ns " "Info: fmax restricted to Clock High delay (2.5 ns) plus Clock Low delay (2.5 ns) : restricted to 5.0 ns. Expand message to see actual delay path." { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.500 ns + Longest register register " "Info: + Longest register to register delay is 3.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[0\] 1 REG LC3_C15 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC3_C15; Fanout = 3; REG Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[0\]'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 0.200 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[0\]~COUT 2 COMB LC3_C15 2 " "Info: 2: + IC(0.000 ns) + CELL(0.200 ns) = 0.200 ns; Loc. = LC3_C15; Fanout = 2; COMB Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[0\]~COUT'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.200 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 0.400 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[1\]~COUT 3 COMB LC4_C15 2 " "Info: 3: + IC(0.000 ns) + CELL(0.200 ns) = 0.400 ns; Loc. = LC4_C15; Fanout = 2; COMB Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[1\]~COUT'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.200 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 0.600 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[2\]~COUT 4 COMB LC5_C15 2 " "Info: 4: + IC(0.000 ns) + CELL(0.200 ns) = 0.600 ns; Loc. = LC5_C15; Fanout = 2; COMB Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[2\]~COUT'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.200 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 0.800 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[3\]~COUT 5 COMB LC6_C15 2 " "Info: 5: + IC(0.000 ns) + CELL(0.200 ns) = 0.800 ns; Loc. = LC6_C15; Fanout = 2; COMB Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[3\]~COUT'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.200 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 1.000 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[4\]~COUT 6 COMB LC7_C15 2 " "Info: 6: + IC(0.000 ns) + CELL(0.200 ns) = 1.000 ns; Loc. = LC7_C15; Fanout = 2; COMB Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[4\]~COUT'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.200 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 1.200 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[5\]~COUT 7 COMB LC8_C15 2 " "Info: 7: + IC(0.000 ns) + CELL(0.200 ns) = 1.200 ns; Loc. = LC8_C15; Fanout = 2; COMB Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[5\]~COUT'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.200 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.500 ns) + CELL(0.200 ns) 1.900 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[6\]~COUT 8 COMB LC1_C17 2 " "Info: 8: + IC(0.500 ns) + CELL(0.200 ns) = 1.900 ns; Loc. = LC1_C17; Fanout = 2; COMB Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[6\]~COUT'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.700 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 2.100 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[7\]~COUT 9 COMB LC2_C17 2 " "Info: 9: + IC(0.000 ns) + CELL(0.200 ns) = 2.100 ns; Loc. = LC2_C17; Fanout = 2; COMB Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[7\]~COUT'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.200 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 2.300 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[8\]~COUT 10 COMB LC3_C17 2 " "Info: 10: + IC(0.000 ns) + CELL(0.200 ns) = 2.300 ns; Loc. = LC3_C17; Fanout = 2; COMB Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[8\]~COUT'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.200 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 2.500 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[9\]~COUT 11 COMB LC4_C17 3 " "Info: 11: + IC(0.000 ns) + CELL(0.200 ns) = 2.500 ns; Loc. = LC4_C17; Fanout = 3; COMB Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[9\]~COUT'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.200 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 2.700 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[10\]~COUT 12 COMB LC5_C17 1 " "Info: 12: + IC(0.000 ns) + CELL(0.200 ns) = 2.700 ns; Loc. = LC5_C17; Fanout = 1; COMB Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|counter_cell\[10\]~COUT'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.200 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[10]~COUT } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.800 ns) 3.500 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[11\] 13 REG LC6_C17 2 " "Info: 13: + IC(0.000 ns) + CELL(0.800 ns) = 3.500 ns; Loc. = LC6_C17; Fanout = 2; REG Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[11\]'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.800 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[10]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.000 ns ( 85.71 % ) " "Info: Total cell delay = 3.000 ns ( 85.71 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.500 ns ( 14.29 % ) " "Info: Total interconnect delay = 0.500 ns ( 14.29 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.500 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[10]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "3.500 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[10]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } { 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.500ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.800ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK1 destination 2.400 ns + Shortest register " "Info: + Shortest clock path from clock \"CLK1\" to destination register is 2.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK1 1 CLK PIN_56 13 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_56; Fanout = 13; CLK Node = 'CLK1'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK1 } "NODE_NAME" } } { "DAC.vhd" "" { Text "D:/0511034406/shiyan14/DAC.vhd" 5 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.000 ns) 2.400 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[11\] 2 REG LC6_C17 2 " "Info: 2: + IC(0.400 ns) + CELL(0.000 ns) = 2.400 ns; Loc. = LC6_C17; Fanout = 2; REG Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[11\]'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.400 ns" { CLK1 lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.000 ns ( 83.33 % ) " "Info: Total cell delay = 2.000 ns ( 83.33 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.400 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.400 ns ( 16.67 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK1 lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK1 CLK1~out lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK1 source 2.400 ns - Longest register " "Info: - Longest clock path from clock \"CLK1\" to source register is 2.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns CLK1 1 CLK PIN_56 13 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_56; Fanout = 13; CLK Node = 'CLK1'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLK1 } "NODE_NAME" } } { "DAC.vhd" "" { Text "D:/0511034406/shiyan14/DAC.vhd" 5 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.000 ns) 2.400 ns lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[0\] 2 REG LC3_C15 3 " "Info: 2: + IC(0.400 ns) + CELL(0.000 ns) = 2.400 ns; Loc. = LC3_C15; Fanout = 3; REG Node = 'lpm_counter:DATA2_rtl_2\|alt_counter_f10ke:wysi_counter\|q\[0\]'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.400 ns" { CLK1 lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.000 ns ( 83.33 % ) " "Info: Total cell delay = 2.000 ns ( 83.33 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.400 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.400 ns ( 16.67 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK1 lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK1 CLK1~out lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK1 lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK1 CLK1~out lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK1 lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK1 CLK1~out lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" { } { { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" { } { { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.500 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[10]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "3.500 ns" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[10]~COUT lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } { 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.500ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.200ns 0.800ns } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK1 lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK1 CLK1~out lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.400 ns" { CLK1 lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "2.400 ns" { CLK1 CLK1~out lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } } 0 0 "fmax restricted to Clock High delay (%1!s!) plus Clock Low delay (%2!s!) : restricted to %3!s!. Expand message to see actual delay path." 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { lpm_counter:DATA2_rtl_2|alt_counter_f10ke:wysi_counter|q[11] } { } { } } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "Clock \"%1!s!\" %7!s! fmax is restricted to %6!s! between source %2!s! \"%4!s!\" and destination %3!s! \"%5!s!\"" 0 0}
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