clksim.tan.rpt

设计实体：lcd驱动器 --彩色液晶芯片LQ080V3DG01 --原创针对博创开发板UP-SOPC2000开发板写的彩色液晶驱动程序

; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[18] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[16] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[20] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[22] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[21] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[19] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[24] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[26] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[25] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[23] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[27] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[28] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[29] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[30] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 102.19 MHz ( period = 9.786 ns )                    ; count_Vsync[18] ; count_Vsync[31] ; clkin      ; clkin    ; None                        ; None                      ; 6.238 ns                ;
; N/A                                     ; 103.80 MHz ( period = 9.634 ns )                    ; count_Vsync[17] ; count_Vsync[24] ; clkin      ; clkin    ; None                        ; None                      ; 6.086 ns                ;
; N/A                                     ; 103.80 MHz ( period = 9.634 ns )                    ; count_Vsync[17] ; count_Vsync[26] ; clkin      ; clkin    ; None                        ; None                      ; 6.086 ns                ;
; N/A                                     ; 103.80 MHz ( period = 9.634 ns )                    ; count_Vsync[17] ; count_Vsync[25] ; clkin      ; clkin    ; None                        ; None                      ; 6.086 ns                ;
; N/A                                     ; 103.80 MHz ( period = 9.634 ns )                    ; count_Vsync[17] ; count_Vsync[23] ; clkin      ; clkin    ; None                        ; None                      ; 6.086 ns                ;
; N/A                                     ; 103.80 MHz ( period = 9.634 ns )                    ; count_Vsync[17] ; count_Vsync[27] ; clkin      ; clkin    ; None                        ; None                      ; 6.086 ns                ;
; N/A                                     ; 103.80 MHz ( period = 9.634 ns )                    ; count_Vsync[17] ; count_Vsync[28] ; clkin      ; clkin    ; None                        ; None                      ; 6.086 ns                ;
; N/A                                     ; 103.80 MHz ( period = 9.634 ns )                    ; count_Vsync[17] ; count_Vsync[29] ; clkin      ; clkin    ; None                        ; None                      ; 6.086 ns                ;
; N/A                                     ; 103.80 MHz ( period = 9.634 ns )                    ; count_Vsync[17] ; count_Vsync[30] ; clkin      ; clkin    ; None                        ; None                      ; 6.086 ns                ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                 ;                 ;            ;          ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+-----------------+-----------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'clkin'                                                                                                                                                                                                           ;
+------------------------------------------+-----------------------------------------------------+-----------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Minimum Slack                            ; From                                                ; To              ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+------------------------------------------+-----------------------------------------------------+-----------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Not operational: Clock Skew > Data Delay ; count_Vsync[7]                                      ; count_Vsync[17] ; clkin      ; clkin    ; None                       ; None                       ; 2.460 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[19]                                     ; count_Vsync[30] ; clkin      ; clkin    ; None                       ; None                       ; 2.461 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[3]                                      ; count_Vsync[14] ; clkin      ; clkin    ; None                       ; None                       ; 2.461 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[0]                                      ; count_Vsync[12] ; clkin      ; clkin    ; None                       ; None                       ; 2.463 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[15]                                     ; count_Vsync[25] ; clkin      ; clkin    ; None                       ; None                       ; 2.468 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[14]                                     ; count_Vsync[24] ; clkin      ; clkin    ; None                       ; None                       ; 2.471 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[9]                                      ; count_Vsync[21] ; clkin      ; clkin    ; None                       ; None                       ; 2.471 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[11]                                     ; count_Vsync[23] ; clkin      ; clkin    ; None                       ; None                       ; 2.472 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[16]                                     ; count_Vsync[28] ; clkin      ; clkin    ; None                       ; None                       ; 2.471 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[1]                                      ; count_Vsync[13] ; clkin      ; clkin    ; None                       ; None                       ; 2.472 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[2]                                      ; count_Vsync[14] ; clkin      ; clkin    ; None                       ; None                       ; 2.473 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[17]                                     ; count_Vsync[29] ; clkin      ; clkin    ; None                       ; None                       ; 2.480 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[18]                                     ; count_Vsync[30] ; clkin      ; clkin    ; None                       ; None                       ; 2.481 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[30] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[29] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[28] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[27] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[23] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[25] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[26] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[24] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[19] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[21] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[22] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[20] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[16] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[18] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[31]                                     ; count_Vsync[17] ; clkin      ; clkin    ; None                       ; None                       ; 2.490 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[8]                                      ; count_Vsync[20] ; clkin      ; clkin    ; None                       ; None                       ; 2.511 ns                 ;
; Not operational: Clock Skew > Data Delay ; count_Vsync[10]                                     ; count_Vsync[22] ; clkin      ; clkin    ; None                       ; None                       ; 2.512 ns                 ;
; Not operational: Clock Skew > Data Delay ; coun