--++¦

来自「里面含大量VHDL设计原代码」· 代码 · 共 52 行

library IEEE;
use IEEE.std_logic_1164.all;

entity tobcd is
    port (
        a: in STD_LOGIC_VECTOR (3 downto 0);
        b: out STD_LOGIC_VECTOR (3 downto 0);
        c: out STD_LOGIC_VECTOR (3 downto 0)
    );
end tobcd;

architecture tobcd_arch of tobcd is
begin
     with a select
     b<="0000" when "0000",
     	"0000" when "0001",
     	"0000" when "0010",
     	"0000" when "0011",
     	"0000" when "0100",
     	"0000" when "0101",
     	"0000" when "0110",
     	"0000" when "0111",
    	"0000" when "1000",
     	"0000" when "1001",
     	"0001" when "1010",
     	"0001" when "1011",
     	"0001" when "1100",
     	"0001" when "1101",
     	"0001" when "1110",
     	"0001" when "1111",
     	"0000" when others;	
     	with a select
     c<="0000" when "0000",
     	"0001" when "0001",
     	"0010" when "0010",
     	"0011" when "0011",
     	"0100" when "0100",
     	"0101" when "0101",
     	"0110" when "0110",
     	"0111" when "0111",
    	"1000" when "1000",
     	"1001" when "1001",
     	"0000" when "1010",
     	"0001" when "1011",
     	"0010" when "1100",
     	"0011" when "1101",
     	"0100" when "1110",
     	"0101" when "1111",
     	"0000" when others;
  -- <<enter your statements here>>
end tobcd_arch;