i2c.fit.rpt

verilog语言在maxII系列芯片上实现iic功能

+------------------------------------+------------------------------+


+----------------------------------------------------------------------------+
; LAB Signals Sourced                                                        ;
+---------------------------------------------+------------------------------+
; Number of Signals Sourced  (Average = 9.07) ; Number of LABs  (Total = 30) ;
+---------------------------------------------+------------------------------+
; 0                                           ; 0                            ;
; 1                                           ; 2                            ;
; 2                                           ; 2                            ;
; 3                                           ; 0                            ;
; 4                                           ; 0                            ;
; 5                                           ; 0                            ;
; 6                                           ; 0                            ;
; 7                                           ; 1                            ;
; 8                                           ; 0                            ;
; 9                                           ; 1                            ;
; 10                                          ; 20                           ;
; 11                                          ; 1                            ;
; 12                                          ; 2                            ;
; 13                                          ; 0                            ;
; 14                                          ; 0                            ;
; 15                                          ; 1                            ;
+---------------------------------------------+------------------------------+


+--------------------------------------------------------------------------------+
; LAB Signals Sourced Out                                                        ;
+-------------------------------------------------+------------------------------+
; Number of Signals Sourced Out  (Average = 6.00) ; Number of LABs  (Total = 30) ;
+-------------------------------------------------+------------------------------+
; 0                                               ; 0                            ;
; 1                                               ; 3                            ;
; 2                                               ; 3                            ;
; 3                                               ; 1                            ;
; 4                                               ; 1                            ;
; 5                                               ; 5                            ;
; 6                                               ; 3                            ;
; 7                                               ; 3                            ;
; 8                                               ; 4                            ;
; 9                                               ; 2                            ;
; 10                                              ; 5                            ;
+-------------------------------------------------+------------------------------+


+-----------------------------------------------------------------------------+
; LAB Distinct Inputs                                                         ;
+----------------------------------------------+------------------------------+
; Number of Distinct Inputs  (Average = 12.93) ; Number of LABs  (Total = 30) ;
+----------------------------------------------+------------------------------+
; 0                                            ; 0                            ;
; 1                                            ; 0                            ;
; 2                                            ; 1                            ;
; 3                                            ; 1                            ;
; 4                                            ; 1                            ;
; 5                                            ; 2                            ;
; 6                                            ; 1                            ;
; 7                                            ; 2                            ;
; 8                                            ; 0                            ;
; 9                                            ; 0                            ;
; 10                                           ; 3                            ;
; 11                                           ; 2                            ;
; 12                                           ; 0                            ;
; 13                                           ; 2                            ;
; 14                                           ; 1                            ;
; 15                                           ; 2                            ;
; 16                                           ; 3                            ;
; 17                                           ; 2                            ;
; 18                                           ; 0                            ;
; 19                                           ; 1                            ;
; 20                                           ; 2                            ;
; 21                                           ; 2                            ;
; 22                                           ; 2                            ;
+----------------------------------------------+------------------------------+


+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 5.1 Build 176 10/26/2005 SJ Full Version
    Info: Processing started: Sun Nov 18 16:17:55 2007
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off i2c -c i2c
Info: Selected device EPM1270T144C5 for design "i2c"
Info: Fitter is performing a Standard Fit compilation using maximum Fitter effort to optimize design performance
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
    Info: Device EPM570T144C5 is compatible
    Info: Device EPM570T144I5 is compatible
    Info: Device EPM1270T144I5 is compatible
    Info: Device EPM1270T144C5ES is compatible
Info: Detected fmax, tsu, tco, and/or tpd requirements -- optimizing circuit to achieve only the specified requirements
Info: Performing register packing on registers with non-logic cell location assignments
Info: Completed register packing on registers with non-logic cell location assignments
Info: Completed User Assigned Global Signals Promotion Operation
Info: Automatically promoted signal "clk" to use Global clock
Info: Pin "clk" drives global clock, but is not placed in a dedicated clock pin position
Info: Automatically promoted signal "rst" to use Global clock
Info: Pin "rst" drives global clock, but is not placed in a dedicated clock pin position
Info: Completed Auto Global Promotion Operation
Info: Starting register packing
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Moving registers into LUTs to improve timing and density
Info: Started processing fast register assignments
Info: Finished processing fast register assignments
Info: Finished moving registers into LUTs
Info: Finished register packing
Warning: Ignored locations or region assignments to the following nodes
    Warning: Node "data_in[4]" is assigned to location or region, but does not exist in design
    Warning: Node "data_in[5]" is assigned to location or region, but does not exist in design
    Warning: Node "data_in[6]" is assigned to location or region, but does not exist in design
    Warning: Node "data_in[7]" is assigned to location or region, but does not exist in design
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:01
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Fitter placement operations ending: elapsed time is 00:00:02
Info: Estimated most critical path is register to register delay of 9.208 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X10_Y5; Fanout = 16; REG Node = 'inner_state.start'
    Info: 2: + IC(0.446 ns) + CELL(0.914 ns) = 1.360 ns; Loc. = LAB_X10_Y5; Fanout = 6; COMB Node = 'readData_reg[0]~77'
    Info: 3: + IC(0.900 ns) + CELL(0.740 ns) = 3.000 ns; Loc. = LAB_X11_Y5; Fanout = 2; COMB Node = 'Select~18683'
    Info: 4: + IC(0.672 ns) + CELL(0.511 ns) = 4.183 ns; Loc. = LAB_X11_Y5; Fanout = 2; COMB Node = 'Select~18685'
    Info: 5: + IC(0.672 ns) + CELL(0.511 ns) = 5.366 ns; Loc. = LAB_X11_Y5; Fanout = 1; COMB Node = 'Select~18786'
    Info: 6: + IC(0.983 ns) + CELL(0.200 ns) = 6.549 ns; Loc. = LAB_X11_Y5; Fanout = 1; COMB Node = 'Select~18686'
    Info: 7: + IC(0.672 ns) + CELL(0.511 ns) = 7.732 ns; Loc. = LAB_X11_Y5; Fanout = 1; COMB Node = 'Select~18687'
    Info: 8: + IC(0.672 ns) + CELL(0.804 ns) = 9.208 ns; Loc. = LAB_X11_Y5; Fanout = 22; REG Node = 'inner_state.ack'
    Info: Total cell delay = 4.191 ns ( 45.51 % )
    Info: Total interconnect delay = 5.017 ns ( 54.49 % )
Info: Fitter routing operations beginning
Info: Average interconnect usage is 5% of the available device resources. Peak interconnect usage is 7%
Info: Fitter routing operations ending: elapsed time is 00:00:01
Info: Following groups of pins have the same output enable
    Info: Following pins have the same output enable: link
        Info: Type bidirectional pin sda uses the LVTTL I/O standard
Info: Quartus II Fitter was successful. 0 errors, 5 warnings
    Info: Processing ended: Sun Nov 18 16:18:05 2007
    Info: Elapsed time: 00:00:11