i2c.map.eqn

verilog语言在maxII系列芯片上实现iic功能

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--A1L315Q is scl~reg0
--operation mode is normal

A1L315Q_lut_out = !phase0 & main_state.00 & (A1L315Q # phase2);
A1L315Q = DFFEAS(A1L315Q_lut_out, clk, rst, , , , , , );


--A1L236Q is en[0]~reg0
--operation mode is normal

A1L236Q_lut_out = !A1L236Q;
A1L236Q = DFFEAS(A1L236Q_lut_out, clk, rst, , A1L302, , , , );


--A1L238Q is en[1]~reg0
--operation mode is normal

A1L238Q_lut_out = !A1L238Q;
A1L238Q = DFFEAS(A1L238Q_lut_out, clk, rst, , A1L302, , , , );


--readData_reg[0] is readData_reg[0]
--operation mode is normal

readData_reg[0]_lut_out = A1L320;
readData_reg[0] = DFFEAS(readData_reg[0]_lut_out, clk, rst, , A1L271, , , , );


--writeData_reg[0] is writeData_reg[0]
--operation mode is normal

writeData_reg[0]_lut_out = !data_in[0];
writeData_reg[0] = DFFEAS(writeData_reg[0]_lut_out, clk, rst, , !main_state.00, , , , );


--A1L330 is seg_data_buf[0]~518
--operation mode is normal

A1L330 = A1L236Q & readData_reg[0] & A1L238Q # !A1L236Q & (!A1L238Q & !writeData_reg[0]);


--readData_reg[1] is readData_reg[1]
--operation mode is normal

readData_reg[1]_lut_out = readData_reg[0];
readData_reg[1] = DFFEAS(readData_reg[1]_lut_out, clk, rst, , A1L271, , , , );


--writeData_reg[1] is writeData_reg[1]
--operation mode is normal

writeData_reg[1]_lut_out = data_in[1];
writeData_reg[1] = DFFEAS(writeData_reg[1]_lut_out, clk, rst, , !main_state.00, , , , );


--A1L331 is seg_data_buf[1]~519
--operation mode is normal

A1L331 = A1L236Q & readData_reg[1] & A1L238Q # !A1L236Q & (!A1L238Q & writeData_reg[1]);


--readData_reg[2] is readData_reg[2]
--operation mode is normal

readData_reg[2]_lut_out = readData_reg[1];
readData_reg[2] = DFFEAS(readData_reg[2]_lut_out, clk, rst, , A1L271, , , , );


--writeData_reg[2] is writeData_reg[2]
--operation mode is normal

writeData_reg[2]_lut_out = !data_in[2];
writeData_reg[2] = DFFEAS(writeData_reg[2]_lut_out, clk, rst, , !main_state.00, , , , );


--A1L332 is seg_data_buf[2]~520
--operation mode is normal

A1L332 = A1L236Q & readData_reg[2] & A1L238Q # !A1L236Q & (!A1L238Q & !writeData_reg[2]);


--readData_reg[3] is readData_reg[3]
--operation mode is normal

readData_reg[3]_lut_out = readData_reg[2];
readData_reg[3] = DFFEAS(readData_reg[3]_lut_out, clk, rst, , A1L271, , , , );


--writeData_reg[3] is writeData_reg[3]
--operation mode is normal

writeData_reg[3]_lut_out = data_in[3];
writeData_reg[3] = DFFEAS(writeData_reg[3]_lut_out, clk, rst, , !main_state.00, , , , );


--A1L333 is seg_data_buf[3]~521
--operation mode is normal

A1L333 = A1L236Q & readData_reg[3] & A1L238Q # !A1L236Q & (!A1L238Q & writeData_reg[3]);


--A1L280 is reduce_or~2160
--operation mode is normal

A1L280 = A1L330 & (A1L333 # A1L331 $ A1L332) # !A1L330 & (A1L331 # A1L332 $ A1L333);


--readData_reg[4] is readData_reg[4]
--operation mode is normal

readData_reg[4]_lut_out = readData_reg[3];
readData_reg[4] = DFFEAS(readData_reg[4]_lut_out, clk, rst, , A1L271, , , , );


--readData_reg[6] is readData_reg[6]
--operation mode is normal

readData_reg[6]_lut_out = readData_reg[5];
readData_reg[6] = DFFEAS(readData_reg[6]_lut_out, clk, rst, , A1L271, , , , );


--A1L281 is reduce_or~2161
--operation mode is normal

A1L281 = !readData_reg[4] & !readData_reg[6] # !A1L238Q # !A1L236Q;


--readData_reg[5] is readData_reg[5]
--operation mode is normal

readData_reg[5]_lut_out = readData_reg[4];
readData_reg[5] = DFFEAS(readData_reg[5]_lut_out, clk, rst, , A1L271, , , , );


--readData_reg[7] is readData_reg[7]
--operation mode is normal

readData_reg[7]_lut_out = readData_reg[6];
readData_reg[7] = DFFEAS(readData_reg[7]_lut_out, clk, rst, , A1L271, , , , );


--A1L282 is reduce_or~2162
--operation mode is normal

A1L282 = !readData_reg[5] & !readData_reg[7] # !A1L238Q # !A1L236Q;


--A1L283 is reduce_or~2163
--operation mode is normal

A1L283 = A1L280 & A1L281 & A1L282;


--A1L284 is reduce_or~2164
--operation mode is normal

A1L284 = A1L330 & (A1L333 $ (A1L331 # !A1L332)) # !A1L330 & A1L331 & !A1L332 & !A1L333;


--A1L285 is reduce_or~2165
--operation mode is normal

A1L285 = A1L284 # !A1L282 # !A1L281;


--A1L286 is reduce_or~2166
--operation mode is normal

A1L286 = A1L331 & A1L330 & (!A1L333) # !A1L331 & (A1L332 & (!A1L333) # !A1L332 & A1L330);


--A1L287 is reduce_or~2167
--operation mode is normal

A1L287 = A1L286 # !A1L282 # !A1L281;


--A1L288 is reduce_or~2168
--operation mode is normal

A1L288 = A1L330 & (A1L331 $ !A1L332) # !A1L330 & (A1L331 & !A1L332 & A1L333 # !A1L331 & A1L332 & !A1L333);


--A1L289 is reduce_or~2169
--operation mode is normal

A1L289 = A1L288 # !A1L282 # !A1L281;


--A1L290 is reduce_or~2170
--operation mode is normal

A1L290 = A1L332 & A1L333 & (A1L331 # !A1L330) # !A1L332 & !A1L330 & A1L331 & !A1L333;


--A1L291 is reduce_or~2171
--operation mode is normal

A1L291 = A1L290 # !A1L282 # !A1L281;


--A1L292 is reduce_or~2172
--operation mode is normal

A1L292 = A1L331 & (A1L330 & (A1L333) # !A1L330 & A1L332) # !A1L331 & A1L332 & (A1L330 $ A1L333);


--A1L293 is reduce_or~2173
--operation mode is normal

A1L293 = A1L292 # !A1L282 # !A1L281;


--A1L294 is reduce_or~2174
--operation mode is normal

A1L294 = A1L332 & !A1L331 & (A1L330 $ !A1L333) # !A1L332 & A1L330 & (A1L331 $ !A1L333);


--A1L295 is reduce_or~2175
--operation mode is normal

A1L295 = A1L294 # !A1L282 # !A1L281;


--phase0 is phase0
--operation mode is normal

phase0_lut_out = A1L303 & A1L304 & !phase0 & !clk_div[3];
phase0 = DFFEAS(phase0_lut_out, clk, rst, , , , , , );


--phase2 is phase2
--operation mode is normal

phase2_lut_out = A1L303 & A1L305 & !phase2 & !clk_div[3];
phase2 = DFFEAS(phase2_lut_out, clk, rst, , , , , , );


--main_state.00 is main_state.00
--operation mode is normal

main_state.00_lut_out = !A1L2 & !A1L110 & (!A1L8 # !A1L6);
main_state.00 = DFFEAS(main_state.00_lut_out, clk, rst, , , , , , );


--cnt_scan[0] is cnt_scan[0]
--operation mode is arithmetic

cnt_scan[0]_lut_out = !cnt_scan[0];
cnt_scan[0] = DFFEAS(cnt_scan[0]_lut_out, clk, rst, , , , , , );

--A1L207 is cnt_scan[0]~85
--operation mode is arithmetic

A1L207 = CARRY(cnt_scan[0]);


--cnt_scan[1] is cnt_scan[1]
--operation mode is arithmetic

cnt_scan[1]_carry_eqn = A1L207;
cnt_scan[1]_lut_out = cnt_scan[1] $ (cnt_scan[1]_carry_eqn);
cnt_scan[1] = DFFEAS(cnt_scan[1]_lut_out, clk, rst, , , , , , );

--A1L209 is cnt_scan[1]~89
--operation mode is arithmetic

A1L209 = CARRY(!A1L207 # !cnt_scan[1]);


--cnt_scan[2] is cnt_scan[2]
--operation mode is arithmetic

cnt_scan[2]_carry_eqn = A1L209;
cnt_scan[2]_lut_out = cnt_scan[2] $ (!cnt_scan[2]_carry_eqn);
cnt_scan[2] = DFFEAS(cnt_scan[2]_lut_out, clk, rst, , , , , , );

--A1L211 is cnt_scan[2]~93
--operation mode is arithmetic

A1L211 = CARRY(cnt_scan[2] & (!A1L209));


--cnt_scan[3] is cnt_scan[3]
--operation mode is arithmetic

cnt_scan[3]_carry_eqn = A1L211;
cnt_scan[3]_lut_out = cnt_scan[3] $ (cnt_scan[3]_carry_eqn);
cnt_scan[3] = DFFEAS(cnt_scan[3]_lut_out, clk, rst, , , , , , );

--A1L213 is cnt_scan[3]~97
--operation mode is arithmetic

A1L213 = CARRY(!A1L211 # !cnt_scan[3]);


--A1L299 is rtl~309
--operation mode is normal

A1L299 = cnt_scan[0] & cnt_scan[1] & cnt_scan[2] & cnt_scan[3];


--cnt_scan[4] is cnt_scan[4]
--operation mode is arithmetic

cnt_scan[4]_carry_eqn = A1L213;
cnt_scan[4]_lut_out = cnt_scan[4] $ (!cnt_scan[4]_carry_eqn);
cnt_scan[4] = DFFEAS(cnt_scan[4]_lut_out, clk, rst, , , , , , );

--A1L215 is cnt_scan[4]~101
--operation mode is arithmetic

A1L215 = CARRY(cnt_scan[4] & (!A1L213));


--cnt_scan[5] is cnt_scan[5]
--operation mode is arithmetic

cnt_scan[5]_carry_eqn = A1L215;
cnt_scan[5]_lut_out = cnt_scan[5] $ (cnt_scan[5]_carry_eqn);
cnt_scan[5] = DFFEAS(cnt_scan[5]_lut_out, clk, rst, , , , , , );

--A1L217 is cnt_scan[5]~105
--operation mode is arithmetic

A1L217 = CARRY(!A1L215 # !cnt_scan[5]);


--cnt_scan[6] is cnt_scan[6]
--operation mode is arithmetic

cnt_scan[6]_carry_eqn = A1L217;
cnt_scan[6]_lut_out = cnt_scan[6] $ (!cnt_scan[6]_carry_eqn);
cnt_scan[6] = DFFEAS(cnt_scan[6]_lut_out, clk, rst, , , , , , );

--A1L219 is cnt_scan[6]~109
--operation mode is arithmetic

A1L219 = CARRY(cnt_scan[6] & (!A1L217));


--cnt_scan[7] is cnt_scan[7]
--operation mode is arithmetic

cnt_scan[7]_carry_eqn = A1L219;
cnt_scan[7]_lut_out = cnt_scan[7] $ (cnt_scan[7]_carry_eqn);
cnt_scan[7] = DFFEAS(cnt_scan[7]_lut_out, clk, rst, , , , , , );

--A1L221 is cnt_scan[7]~113
--operation mode is arithmetic

A1L221 = CARRY(!A1L219 # !cnt_scan[7]);


--A1L300 is rtl~310
--operation mode is normal

A1L300 = cnt_scan[4] & cnt_scan[5] & cnt_scan[6] & cnt_scan[7];


--cnt_scan[8] is cnt_scan[8]
--operation mode is arithmetic

cnt_scan[8]_carry_eqn = A1L221;
cnt_scan[8]_lut_out = cnt_scan[8] $ (!cnt_scan[8]_carry_eqn);
cnt_scan[8] = DFFEAS(cnt_scan[8]_lut_out, clk, rst, , , , , , );

--A1L223 is cnt_scan[8]~117
--operation mode is arithmetic

A1L223 = CARRY(cnt_scan[8] & (!A1L221));


--cnt_scan[9] is cnt_scan[9]
--operation mode is arithmetic

cnt_scan[9]_carry_eqn = A1L223;
cnt_scan[9]_lut_out = cnt_scan[9] $ (cnt_scan[9]_carry_eqn);
cnt_scan[9] = DFFEAS(cnt_scan[9]_lut_out, clk, rst, , , , , , );

--A1L225 is cnt_scan[9]~121
--operation mode is arithmetic

A1L225 = CARRY(!A1L223 # !cnt_scan[9]);


--cnt_scan[10] is cnt_scan[10]
--operation mode is arithmetic

cnt_scan[10]_carry_eqn = A1L225;
cnt_scan[10]_lut_out = cnt_scan[10] $ (!cnt_scan[10]_carry_eqn);
cnt_scan[10] = DFFEAS(cnt_scan[10]_lut_out, clk, rst, , , , , , );

--A1L227 is cnt_scan[10]~125
--operation mode is arithmetic

A1L227 = CARRY(cnt_scan[10] & (!A1L225));


--cnt_scan[11] is cnt_scan[11]
--operation mode is normal

cnt_scan[11]_carry_eqn = A1L227;
cnt_scan[11]_lut_out = cnt_scan[11] $ (cnt_scan[11]_carry_eqn);
cnt_scan[11] = DFFEAS(cnt_scan[11]_lut_out, clk, rst, , , , , , );


--A1L301 is rtl~311
--operation mode is normal

A1L301 = cnt_scan[8] & cnt_scan[9] & cnt_scan[10] & cnt_scan[11];


--A1L302 is rtl~312
--operation mode is normal

A1L302 = A1L299 & A1L300 & A1L301;


--phase1 is phase1
--operation mode is normal

phase1_lut_out = phase1 # A1L297;
phase1 = DFFEAS(phase1_lut_out, clk, rst, , , , , phase1, );


--main_state.10 is main_state.10
--operation mode is normal

main_state.10_lut_out = !A1L110 & (A1L11 & wr_input # !A1L11 & (A1L111));
main_state.10 = DFFEAS(main_state.10_lut_out, clk, rst, , , , , , );


--i2c_state.read_data is i2c_state.read_data
--operation mode is normal

i2c_state.read_data_lut_out = i2c_state.read_data & (A1L13 # A1L244 & A1L12) # !i2c_state.read_data & A1L244 & A1L12;
i2c_state.read_data = DFFEAS(i2c_state.read_data_lut_out, clk, rst, , , , , , );


--A1L269 is readData_reg[0]~76
--operation mode is normal

A1L269 = main_state.10 & i2c_state.read_data;


--inner_state.start is inner_state.start
--operation mode is normal

inner_state.start_lut_out = !A1L17 & !A1L18 & main_state.10 # !A1L14;
inner_state.start = DFFEAS(inner_state.start_lut_out, clk, rst, , , , , , );


--inner_state.stop is inner_state.stop
--operation mode is normal

inner_state.stop_lut_out = inner_state.stop & (A1L13 # A1L244 & A1L19) # !inner_state.stop & A1L244 & A1L19;
inner_state.stop = DFFEAS(inner_state.stop_lut_out, clk, rst, , , , , , );


--A1L270 is readData_reg[0]~77
--operation mode is normal

A1L270 = inner_state.start & (!inner_state.stop);


--inner_state.ack is inner_state.ack
--operation mode is normal

inner_state.ack_lut_out = A1L22 # A1L24 # A1L29 & A1L30;
inner_state.ack = DFFEAS(inner_state.ack_lut_out, clk, rst, , , , , , );


--A1L271 is readData_reg[0]~78
--operation mode is normal

A1L271 = phase1 & A1L269 & A1L270 & !inner_state.ack;


--clk_div[5] is clk_div[5]
--operation mode is normal

clk_div[5]_lut_out = A1L121 & (clk_div[3] # !A1L304 # !A1L303);
clk_div[5] = DFFEAS(clk_div[5]_lut_out, clk, rst, , , , , , );


--clk_div[7] is clk_div[7]
--operation mode is normal

clk_div[7]_lut_out = A1L123;
clk_div[7] = DFFEAS(clk_div[7]_lut_out, clk, rst, , , , , , );


--clk_div[2] is clk_div[2]
--operation mode is normal

clk_div[2]_lut_out = A1L124 & (clk_div[3] # !A1L304 # !A1L303);
clk_div[2] = DFFEAS(clk_div[2]_lut_out, clk, rst, , , , , , );


--A1L303 is rtl~313
--operation mode is normal

A1L303 = cnt_scan[0] & clk_div[5] & !clk_div[7] & !clk_div[2];