ls138.map.summary

来自「基于VHDL的LS138译码器的实现 一个很简单的程序」· SUMMARY 代码 · 共 10 行

Analysis & Synthesis Status : Successful - Fri Apr 18 21:46:01 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : ls138
Top-level Entity Name : ls138
Family : ACEX1K
Total logic elements : 10
Total pins : 14
Total memory bits : 0
Total PLLs : 0