myfirstproject.map.summary

用VHDL原理图输入的方法实现d触发器的功能

Analysis & Synthesis Status : Successful - Wed May 07 15:41:22 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : MyFirstProject
Top-level Entity Name : MyFirstProject
Family : Cyclone
Total logic elements : 1
Total pins : 5
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0