topclock.fnsim.qmsg

VHDL写的数字钟

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Functional Simulation Netlist Generation Quartus II " "Info: Running Quartus II Functional Simulation Netlist Generation" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Apr 07 06:58:45 2008 " "Info: Processing started: Mon Apr 07 06:58:45 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off topclock -c topclock --generate_functional_sim_netlist " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off topclock -c topclock --generate_functional_sim_netlist" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "topclock.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file topclock.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 topclock-one " "Info: Found design unit 1: topclock-one" {  } { { "topclock.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/topclock.vhd" 17 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 topclock " "Info: Found entity 1: topclock" {  } { { "topclock.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/topclock.vhd" 7 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "second1.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file second1.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 second1-a " "Info: Found design unit 1: second1-a" {  } { { "second1.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/second1.vhd" 13 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 second1 " "Info: Found entity 1: second1" {  } { { "second1.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/second1.vhd" 6 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "minute1.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file minute1.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 minute1-b " "Info: Found design unit 1: minute1-b" {  } { { "minute1.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/minute1.vhd" 14 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 minute1 " "Info: Found entity 1: minute1" {  } { { "minute1.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/minute1.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "hour1.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file hour1.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 hour1-a " "Info: Found design unit 1: hour1-a" {  } { { "hour1.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/hour1.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 hour1 " "Info: Found entity 1: hour1" {  } { { "hour1.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/hour1.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "day1.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file day1.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 day1-a " "Info: Found design unit 1: day1-a" {  } { { "day1.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/day1.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 day1 " "Info: Found entity 1: day1" {  } { { "day1.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/day1.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "alarm1.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file alarm1.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 alarm1-a " "Info: Found design unit 1: alarm1-a" {  } { { "alarm1.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/alarm1.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 alarm1 " "Info: Found entity 1: alarm1" {  } { { "alarm1.vhd" "" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/alarm1.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "topclock " "Info: Elaborating entity \"topclock\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "second1 second1:u1 " "Info: Elaborating entity \"second1\" for hierarchy \"second1:u1\"" {  } { { "topclock.vhd" "u1" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/topclock.vhd" 64 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "minute1 minute1:u2 " "Info: Elaborating entity \"minute1\" for hierarchy \"minute1:u2\"" {  } { { "topclock.vhd" "u2" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/topclock.vhd" 65 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "hour1 hour1:u3 " "Info: Elaborating entity \"hour1\" for hierarchy \"hour1:u3\"" {  } { { "topclock.vhd" "u3" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/topclock.vhd" 66 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "day1 day1:u4 " "Info: Elaborating entity \"day1\" for hierarchy \"day1:u4\"" {  } { { "topclock.vhd" "u4" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/topclock.vhd" 67 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "alarm1 alarm1:u5 " "Info: Elaborating entity \"alarm1\" for hierarchy \"alarm1:u5\"" {  } { { "topclock.vhd" "u5" { Text "C:/Documents and Settings/Administrator.ZHONGNAN-A8BD31/桌面/topclock/topclock.vhd" 68 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/program files/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/program files/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" {  } { { "lpm_add_sub.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 100 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "day1:u4\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"day1:u4\|lpm_add_sub:Add0\"" {  } { { "d:/program files/altera/quartus60/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "d:/program files/altera/quartus60/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/program files/altera/quartus60/libraries/megafunctions/addcore.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/program files/altera/quartus60/libraries/megafunctions/addcore.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 addcore " "Info: Found entity 1: addcore" {  } { { "addcore.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/addcore.tdf" 73 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "day1:u4\|lpm_add_sub:Add0\|addcore:adder day1:u4\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"day1:u4\|lpm_add_sub:Add0\|addcore:adder\", which is child of megafunction instantiation \"day1:u4\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 266 4 0 } } { "d:/program files/altera/quartus60/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "d:/program files/altera/quartus60/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "day1:u4\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"day1:u4\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 3 " "Info: Parameter \"LPM_WIDTH\" = \"3\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/program files/altera/quartus60/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "d:/program files/altera/quartus60/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/program files/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/program files/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_csnbuffer " "Info: Found entity 1: a_csnbuffer" {  } { { "a_csnbuffer.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 10 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}