sin.fit.qmsg

基于Quartus II 5.0编写的正弦波发生器

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Jun 03 12:35:07 2008 " "Info: Processing started: Tue Jun 03 12:35:07 2008" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off sin -c sin " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off sin -c sin" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "sin EP1C3T144C8 " "Info: Selected device EP1C3T144C8 for design \"sin\"" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1C6T144C8 " "Info: Device EP1C6T144C8 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "21 21 " "Info: No exact pin location assignment(s) for 21 pins of 21 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[0\] " "Info: Pin dout\[0\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 9 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[0\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { dout[0] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { dout[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[1\] " "Info: Pin dout\[1\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 9 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[1\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { dout[1] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { dout[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[2\] " "Info: Pin dout\[2\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 9 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[2\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { dout[2] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { dout[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[3\] " "Info: Pin dout\[3\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 9 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[3\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { dout[3] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { dout[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[4\] " "Info: Pin dout\[4\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 9 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[4\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { dout[4] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { dout[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[5\] " "Info: Pin dout\[5\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 9 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[5\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { dout[5] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { dout[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[6\] " "Info: Pin dout\[6\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 9 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[6\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { dout[6] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { dout[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "dout\[7\] " "Info: Pin dout\[7\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 9 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "dout\[7\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { dout[7] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { dout[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tdo " "Info: Pin altera_reserved_tdo not assigned to an exact location on the device" {  } { { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tdo" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { altera_reserved_tdo } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { altera_reserved_tdo } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "clk " "Info: Pin clk not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 7 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { clk } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { clk } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tms " "Info: Pin altera_reserved_tms not assigned to an exact location on the device" {  } { { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tms" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { altera_reserved_tms } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { altera_reserved_tms } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tck " "Info: Pin altera_reserved_tck not assigned to an exact location on the device" {  } { { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tck" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { altera_reserved_tck } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { altera_reserved_tck } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tdi " "Info: Pin altera_reserved_tdi not assigned to an exact location on the device" {  } { { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tdi" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { altera_reserved_tdi } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { altera_reserved_tdi } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "fword\[0\] " "Info: Pin fword\[0\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 8 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "fword\[0\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { fword[0] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { fword[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "fword\[1\] " "Info: Pin fword\[1\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 8 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "fword\[1\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { fword[1] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { fword[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "fword\[2\] " "Info: Pin fword\[2\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 8 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "fword\[2\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { fword[2] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { fword[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "fword\[3\] " "Info: Pin fword\[3\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 8 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "fword\[3\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { fword[3] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { fword[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "fword\[4\] " "Info: Pin fword\[4\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 8 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "fword\[4\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { fword[4] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { fword[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "fword\[5\] " "Info: Pin fword\[5\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 8 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "fword\[5\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { fword[5] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { fword[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "fword\[6\] " "Info: Pin fword\[6\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 8 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "fword\[6\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { fword[6] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { fword[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "fword\[7\] " "Info: Pin fword\[7\] not assigned to an exact location on the device" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 8 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "fword\[7\]" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { fword[7] } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { fword[7] } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources." {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clk Global clock in PIN 17 " "Info: Automatically promoted signal \"clk\" to use Global clock in PIN 17" {  } { { "sin.vhd" "" { Text "D:/altera/shiyan/sin/sin.vhd" 7 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "altera_internal_jtag~TCKUTAP Global clock " "Info: Automatically promoted signal \"altera_internal_jtag~TCKUTAP\" to use Global clock" {  } { { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "altera_internal_jtag~TDO" } } } } { "D:/altera/shiyan/sin/db/sin_cmp.qrpt" "" { Report "D:/altera/shiyan/sin/db/sin_cmp.qrpt" Compiler "sin" "UNKNOWN" "V1" "D:/altera/shiyan/sin/db/sin.quartus_db" { Floorplan "D:/altera/shiyan/sin/" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } "" } } { "D:/altera/shiyan/sin/sin.fld" "" { Floorplan "D:/altera/shiyan/sin/sin.fld" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "sld_hub:sld_hub_inst\|CLEAR_SIGNAL~0 Global clock " "Info: Automatically promoted signal \"sld_hub:sld_hub_inst\|CLEAR_SIGNAL~0\" to use Global clock" {  } { { "sld_hub.vhd" "" { Text "d:/program files/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 307 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "data_rom:u3\|altsyncram:altsyncram_component\|altsyncram_cfu:auto_generated\|sld_mod_ram_rom:mgl_prim2\|sld_rom_sr:\\ram_rom_logic_gen:name_gen:info_rom_sr\|clear_signal Global clock " "Info: Automatically promoted signal \"data_rom:u3\|altsyncram:altsyncram_component\|altsyncram_cfu:auto_generated\|sld_mod_ram_rom:mgl_prim2\|sld_rom_sr:\\ram_rom_logic_gen:name_gen:info_rom_sr\|clear_signal\" to use Global clock" {  } { { "sld_rom_sr.vhd" "" { Text "d:/program files/altera/quartus50/libraries/megafunctions/sld_rom_sr.vhd" 36 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[0\] Global clock " "Info: Automatically promoted some destinations of signal \"sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[0\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "sld_hub:sld_hub_inst\|hub_tdo~360 " "Info: Destination \"sld_hub:sld_hub_inst\|hub_tdo~360\" may be non-global or may not use global clock" {  } { { "sld_hub.vhd" "" { Text "d:/program files/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "data_rom:u3\|altsyncram:altsyncram_component\|altsyncram_cfu:auto_generated\|sld_mod_ram_rom:mgl_prim2\|is_in_use_reg " "Info: Destination \"data_rom:u3\|altsyncram:altsyncram_component\|altsyncram_cfu:auto_generated\|sld_mod_ram_rom:mgl_prim2\|is_in_use_reg\" may be non-global or may not use global clock" {  } {  } 0}  } { { "sld_dffex.vhd" "" { Text "d:/program files/altera/quartus50/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } }  } 0}