sin.fit.eqn

基于Quartus II 5.0编写的正弦波发生器

--F1_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3] at LC_X17_Y7_N2
--operation mode is normal

F1_Q[3] = AMPP_FUNCTION(A1L5, F6_Q[3], F2_Q[3], F3_Q[0], !B1L2, B1L71);


--Q1_ram_rom_data_shift_cntr_reg[1] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] at LC_X20_Y6_N2
--operation mode is arithmetic

Q1_ram_rom_data_shift_cntr_reg[1] = AMPP_FUNCTION(A1L5, Q1_ram_rom_data_shift_cntr_reg[1], !F1_Q[3], Q1L76, Q1L55, Q1L65);

--Q1L85 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]~74 at LC_X20_Y6_N2
--operation mode is arithmetic

Q1L85 = AMPP_FUNCTION(Q1_ram_rom_data_shift_cntr_reg[1], Q1L55);

--Q1L95 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]~74COUT1 at LC_X20_Y6_N2
--operation mode is arithmetic

Q1L95 = AMPP_FUNCTION(Q1_ram_rom_data_shift_cntr_reg[1], Q1L65);


--F1_Q[1] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] at LC_X15_Y6_N5
--operation mode is normal

F1_Q[1] = AMPP_FUNCTION(A1L5, F3_Q[0], F6_Q[1], F2_Q[1], !B1L2, B1L71);


--Q1_ram_rom_data_shift_cntr_reg[0] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] at LC_X20_Y6_N1
--operation mode is arithmetic

Q1_ram_rom_data_shift_cntr_reg[0] = AMPP_FUNCTION(A1L5, Q1_ram_rom_data_shift_cntr_reg[0], Q1L31, !F1_Q[3], Q1L76);

--Q1L55 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]~78 at LC_X20_Y6_N1
--operation mode is arithmetic

Q1L55 = AMPP_FUNCTION(Q1_ram_rom_data_shift_cntr_reg[0], Q1L31);

--Q1L65 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]~78COUT1_90 at LC_X20_Y6_N1
--operation mode is arithmetic

Q1L65 = AMPP_FUNCTION(Q1_ram_rom_data_shift_cntr_reg[0], Q1L31);


--Q1_ram_rom_data_shift_cntr_reg[2] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] at LC_X20_Y6_N3
--operation mode is arithmetic

Q1_ram_rom_data_shift_cntr_reg[2] = AMPP_FUNCTION(A1L5, Q1_ram_rom_data_shift_cntr_reg[2], !F1_Q[3], Q1L76, Q1L85, Q1L95);

--Q1L16 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]~82 at LC_X20_Y6_N3
--operation mode is arithmetic

Q1L16 = AMPP_FUNCTION(Q1_ram_rom_data_shift_cntr_reg[2], Q1L85);

--Q1L26 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]~82COUT1_91 at LC_X20_Y6_N3
--operation mode is arithmetic

Q1L26 = AMPP_FUNCTION(Q1_ram_rom_data_shift_cntr_reg[2], Q1L95);


--Q1_ram_rom_data_shift_cntr_reg[3] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[3] at LC_X20_Y6_N4
--operation mode is normal

Q1_ram_rom_data_shift_cntr_reg[3] = AMPP_FUNCTION(A1L5, Q1_ram_rom_data_shift_cntr_reg[3], !F1_Q[3], Q1L76, Q1L16, Q1L26);


--Q1L66 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~34 at LC_X17_Y6_N0
--operation mode is normal

Q1L66 = AMPP_FUNCTION(Q1_ram_rom_data_shift_cntr_reg[0], Q1_ram_rom_data_shift_cntr_reg[2], Q1_ram_rom_data_shift_cntr_reg[3]);


--Q1L21 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~1 at LC_X17_Y6_N3
--operation mode is normal

Q1L21 = AMPP_FUNCTION(F1_Q[3], F1_Q[1], Q1_ram_rom_data_shift_cntr_reg[1], Q1L66);


--Q1L31 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~3 at LC_X17_Y6_N4
--operation mode is normal

Q1L31 = AMPP_FUNCTION(Q1L01, K1_state[4], F1_Q[1], F1_Q[2]);


--Q1L25 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]~643 at LC_X17_Y6_N9
--operation mode is normal

Q1L25 = AMPP_FUNCTION(Q1L21, Q1L31);


--Q1L56 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~0 at LC_X17_Y6_N5
--operation mode is normal

Q1L56 = AMPP_FUNCTION(F1_Q[1], Q1_ram_rom_data_shift_cntr_reg[1], Q1L66);


--Q1_ram_rom_incr_addr is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr at LC_X17_Y6_N1
--operation mode is normal

Q1_ram_rom_incr_addr = AMPP_FUNCTION(K1_state[8], Q1L56, F1_Q[2], Q1L01);


--F1_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0] at LC_X17_Y7_N9
--operation mode is normal

F1_Q[0] = AMPP_FUNCTION(A1L5, F2_Q[0], F6_Q[0], F3_Q[0], !B1L2, B1L71);


--Q1L11 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|process0~11 at LC_X18_Y6_N1
--operation mode is normal

Q1L11 = AMPP_FUNCTION(K1_state[4], Q1L01, F1_Q[3]);


--F6_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0] at LC_X16_Y7_N3
--operation mode is normal

F6_Q[0] = AMPP_FUNCTION(A1L5, K1_state[4], F6_Q[1], Q1_is_in_use_reg, !B1L2, F6L4);


--G1_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] at LC_X20_Y5_N5
--operation mode is normal

G1_WORD_SR[0] = AMPP_FUNCTION(A1L5, G1_word_counter[0], G1L72, G1_WORD_SR[1], G1L82, !G2_clear_signal, K1_state[4], B1L4);


--L1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[0] at LC_X20_Y7_N8
--operation mode is normal

L1_dffe1a[0] = AMPP_FUNCTION(A1L5, F6_Q[3], F6_Q[2], F6_Q[1], B1L22, !B1L2, B1L7);


--B1L21 is sld_hub:sld_hub_inst|hub_tdo~358 at LC_X19_Y7_N0
--operation mode is normal

B1L21 = AMPP_FUNCTION(L1_dffe1a[0], G1_WORD_SR[0], F5_Q[0]);

--B1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG at LC_X19_Y7_N0
--operation mode is normal

B1_HUB_BYPASS_REG = AMPP_FUNCTION(A1L5, B1L01, VCC, GND);


--B1L31 is sld_hub:sld_hub_inst|hub_tdo~359 at LC_X17_Y6_N8
--operation mode is normal

B1L31 = AMPP_FUNCTION(Q1_ram_rom_data_reg[0], F1_Q[1], F1_Q[2]);

--Q1_bypass_reg_out is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out at LC_X17_Y6_N8
--operation mode is normal

Q1_bypass_reg_out = AMPP_FUNCTION(A1L5, altera_internal_jtag, !B1L2, GND, B1L42);


--G2_WORD_SR[0] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] at LC_X21_Y7_N2
--operation mode is normal

G2_WORD_SR[0] = AMPP_FUNCTION(A1L5, G2L82, G2_word_counter[0], G2_WORD_SR[1], G2L92, !G2_clear_signal, K1_state[4], Q1L9);


--B1L41 is sld_hub:sld_hub_inst|hub_tdo~360 at LC_X18_Y7_N5
--operation mode is normal

B1L41 = AMPP_FUNCTION(B1L31, G2_WORD_SR[0], F1_Q[0]);

--F4_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] at LC_X18_Y7_N5
--operation mode is normal

F4_Q[0] = AMPP_FUNCTION(A1L5, altera_internal_jtag, !B1L2, GND, B1L51);


--K1L81 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 at LC_X19_Y7_N7
--operation mode is normal

K1L81 = AMPP_FUNCTION(K1_state[4], K1_state[3]);


--K1_state[7] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[7] at LC_X18_Y5_N5
--operation mode is normal

K1_state[7] = AMPP_FUNCTION(A1L5, A1L7, K1_state[6], VCC);


--B1L8 is sld_hub:sld_hub_inst|GEN_SHADOW_IRF~0 at LC_X17_Y7_N7
--operation mode is normal

B1L8 = AMPP_FUNCTION(F4_Q[0], K1_state[5], B1_OK_TO_UPDATE_IR_Q);


--F6_Q[3] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[3] at LC_X16_Y7_N8
--operation mode is normal

F6_Q[3] = AMPP_FUNCTION(A1L5, F6_Q[4], K1_state[4], Q1_ir_loaded_address_reg[2], !B1L2, F6L4);


--Q1_ir_loaded_address_reg[1] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1] at LC_X16_Y7_N6
--operation mode is normal

Q1_ir_loaded_address_reg[1] = AMPP_FUNCTION(A1L5, Q1_ram_rom_addr_reg[1], !F1_Q[0], Q1L41);


--L1_dffe1a[3] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[3] at LC_X20_Y7_N3
--operation mode is normal

L1_dffe1a[3] = AMPP_FUNCTION(A1L5, F6_Q[3], F6_Q[2], F6_Q[1], B1L22, !B1L2, B1L7);


--F6L3 is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]~111 at LC_X20_Y7_N2
--operation mode is normal

F6L3 = AMPP_FUNCTION(F6_Q[3], L1_dffe1a[3], K1_state[4]);

--F6_Q[5] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[5] at LC_X20_Y7_N2
--operation mode is normal

F6_Q[5] = AMPP_FUNCTION(A1L5, B1L01, !B1L2, GND, B1_IRSR_ENA);


--L1_dffe1a[7] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[7] at LC_X20_Y7_N1
--operation mode is normal

L1_dffe1a[7] = AMPP_FUNCTION(A1L5, F6_Q[3], F6_Q[2], F6_Q[1], B1L22, !B1L2, B1L7);


--B1L3 is sld_hub:sld_hub_inst|comb~6 at LC_X15_Y6_N2
--operation mode is normal

B1L3 = AMPP_FUNCTION(F3_Q[0], K1_state[8], B1_OK_TO_UPDATE_IR_Q);


--F6_Q[1] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[1] at LC_X16_Y7_N2
--operation mode is normal

F6_Q[1] = AMPP_FUNCTION(A1L5, Q1_ir_loaded_address_reg[0], F6_Q[2], K1_state[4], !B1L2, F6L4);


--B1L6 is sld_hub:sld_hub_inst|comb~67 at LC_X19_Y7_N9