sin.fit.eqn

基于Quartus II 5.0编写的正弦波发生器

--D1_dout[12] is reg16b:u2|dout[12] at LC_X15_Y7_N6
--operation mode is arithmetic

D1_dout[12]_carry_eqn = (!D1L51 & D1L71) # (D1L51 & D1L81);
D1_dout[12]_lut_out = D1_dout[12] $ fword[6] $ !D1_dout[12]_carry_eqn;
D1_dout[12] = DFFEAS(D1_dout[12]_lut_out, GLOBAL(clk), VCC, , , , , , );

--D1L02 is reg16b:u2|dout[12]~101 at LC_X15_Y7_N6
--operation mode is arithmetic

D1L02_cout_0 = D1_dout[12] & (fword[6] # !D1L71) # !D1_dout[12] & fword[6] & !D1L71;
D1L02 = CARRY(D1L02_cout_0);

--D1L12 is reg16b:u2|dout[12]~101COUT1_122 at LC_X15_Y7_N6
--operation mode is arithmetic

D1L12_cout_1 = D1_dout[12] & (fword[6] # !D1L81) # !D1_dout[12] & fword[6] & !D1L81;
D1L12 = CARRY(D1L12_cout_1);


--D1_dout[13] is reg16b:u2|dout[13] at LC_X15_Y7_N7
--operation mode is arithmetic

D1_dout[13]_carry_eqn = (!D1L51 & D1L02) # (D1L51 & D1L12);
D1_dout[13]_lut_out = D1_dout[13] $ fword[7] $ D1_dout[13]_carry_eqn;
D1_dout[13] = DFFEAS(D1_dout[13]_lut_out, GLOBAL(clk), VCC, , , , , , );

--D1L32 is reg16b:u2|dout[13]~105 at LC_X15_Y7_N7
--operation mode is arithmetic

D1L32_cout_0 = D1_dout[13] & !fword[7] & !D1L02 # !D1_dout[13] & (!D1L02 # !fword[7]);
D1L32 = CARRY(D1L32_cout_0);

--D1L42 is reg16b:u2|dout[13]~105COUT1_123 at LC_X15_Y7_N7
--operation mode is arithmetic

D1L42_cout_1 = D1_dout[13] & !fword[7] & !D1L12 # !D1_dout[13] & (!D1L12 # !fword[7]);
D1L42 = CARRY(D1L42_cout_1);


--D1_dout[14] is reg16b:u2|dout[14] at LC_X15_Y7_N8
--operation mode is arithmetic

D1_dout[14]_carry_eqn = (!D1L51 & D1L32) # (D1L51 & D1L42);
D1_dout[14]_lut_out = D1_dout[14] $ !D1_dout[14]_carry_eqn;
D1_dout[14] = DFFEAS(D1_dout[14]_lut_out, GLOBAL(clk), VCC, , , , , , );

--D1L62 is reg16b:u2|dout[14]~109 at LC_X15_Y7_N8
--operation mode is arithmetic

D1L62_cout_0 = D1_dout[14] & !D1L32;
D1L62 = CARRY(D1L62_cout_0);

--D1L72 is reg16b:u2|dout[14]~109COUT1_124 at LC_X15_Y7_N8
--operation mode is arithmetic

D1L72_cout_1 = D1_dout[14] & !D1L42;
D1L72 = CARRY(D1L72_cout_1);


--D1_dout[15] is reg16b:u2|dout[15] at LC_X15_Y7_N9
--operation mode is normal

D1_dout[15]_carry_eqn = (!D1L51 & D1L62) # (D1L51 & D1L72);
D1_dout[15]_lut_out = D1_dout[15] $ (D1_dout[15]_carry_eqn);
D1_dout[15] = DFFEAS(D1_dout[15]_lut_out, GLOBAL(clk), VCC, , , , , , );


--Q1_ram_rom_data_reg[0] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0] at LC_X17_Y6_N7
--operation mode is normal

Q1_ram_rom_data_reg[0] = AMPP_FUNCTION(A1L5, Q1L21, Q1_ram_rom_data_reg[1], P1_q_b[0], VCC, Q1L25);


--Q1_ram_rom_addr_reg[0] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0] at LC_X16_Y6_N0
--operation mode is arithmetic

Q1_ram_rom_addr_reg[0] = AMPP_FUNCTION(A1L5, Q1_ram_rom_incr_addr, Q1_ram_rom_addr_reg[0], Q1_ram_rom_addr_reg[1], !F1_Q[0], Q1L11);

--Q1L71 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]~141 at LC_X16_Y6_N0
--operation mode is arithmetic

Q1L71 = AMPP_FUNCTION(Q1_ram_rom_incr_addr, Q1_ram_rom_addr_reg[0]);

--Q1L81 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]~141COUT1_181 at LC_X16_Y6_N0
--operation mode is arithmetic

Q1L81 = AMPP_FUNCTION(Q1_ram_rom_incr_addr, Q1_ram_rom_addr_reg[0]);


--Q1_ram_rom_addr_reg[1] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1] at LC_X16_Y6_N1
--operation mode is arithmetic

Q1_ram_rom_addr_reg[1] = AMPP_FUNCTION(A1L5, Q1_ram_rom_addr_reg[1], Q1_ram_rom_addr_reg[2], !F1_Q[0], Q1L11, Q1L71, Q1L81);

--Q1L02 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]~145 at LC_X16_Y6_N1
--operation mode is arithmetic

Q1L02 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[1], Q1L71);

--Q1L12 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]~145COUT1_182 at LC_X16_Y6_N1
--operation mode is arithmetic

Q1L12 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[1], Q1L81);


--Q1_ram_rom_addr_reg[2] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2] at LC_X16_Y6_N2
--operation mode is arithmetic

Q1_ram_rom_addr_reg[2] = AMPP_FUNCTION(A1L5, Q1_ram_rom_addr_reg[2], Q1_ram_rom_addr_reg[3], !F1_Q[0], Q1L11, Q1L02, Q1L12);

--Q1L32 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]~149 at LC_X16_Y6_N2
--operation mode is arithmetic

Q1L32 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[2], Q1L02);

--Q1L42 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]~149COUT1_183 at LC_X16_Y6_N2
--operation mode is arithmetic

Q1L42 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[2], Q1L12);


--Q1_ram_rom_addr_reg[3] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3] at LC_X16_Y6_N3
--operation mode is arithmetic

Q1_ram_rom_addr_reg[3] = AMPP_FUNCTION(A1L5, Q1_ram_rom_addr_reg[3], Q1_ram_rom_addr_reg[4], !F1_Q[0], Q1L11, Q1L32, Q1L42);

--Q1L62 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]~153 at LC_X16_Y6_N3
--operation mode is arithmetic

Q1L62 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[3], Q1L32);

--Q1L72 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]~153COUT1_184 at LC_X16_Y6_N3
--operation mode is arithmetic

Q1L72 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[3], Q1L42);


--Q1_ram_rom_addr_reg[4] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4] at LC_X16_Y6_N4
--operation mode is arithmetic

Q1_ram_rom_addr_reg[4] = AMPP_FUNCTION(A1L5, Q1_ram_rom_addr_reg[4], Q1_ram_rom_addr_reg[5], !F1_Q[0], Q1L11, Q1L62, Q1L72);

--Q1L92 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]~157 at LC_X16_Y6_N4
--operation mode is arithmetic

Q1L92 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[4], Q1L62, Q1L72);


--Q1_ram_rom_addr_reg[5] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5] at LC_X16_Y6_N5
--operation mode is arithmetic

Q1_ram_rom_addr_reg[5] = AMPP_FUNCTION(A1L5, Q1_ram_rom_addr_reg[5], Q1_ram_rom_addr_reg[6], !F1_Q[0], Q1L11, Q1L92);

--Q1L13 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]~161 at LC_X16_Y6_N5
--operation mode is arithmetic

Q1L13 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[5]);

--Q1L23 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]~161COUT1_185 at LC_X16_Y6_N5
--operation mode is arithmetic

Q1L23 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[5]);


--Q1_ram_rom_addr_reg[6] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6] at LC_X16_Y6_N6
--operation mode is arithmetic

Q1_ram_rom_addr_reg[6] = AMPP_FUNCTION(A1L5, Q1_ram_rom_addr_reg[6], Q1_ram_rom_addr_reg[7], !F1_Q[0], Q1L11, Q1L92, Q1L13, Q1L23);

--Q1L43 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]~165 at LC_X16_Y6_N6
--operation mode is arithmetic

Q1L43 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[6], Q1L13);

--Q1L53 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]~165COUT1_186 at LC_X16_Y6_N6
--operation mode is arithmetic

Q1L53 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[6], Q1L23);


--Q1_ram_rom_addr_reg[7] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7] at LC_X16_Y6_N7
--operation mode is arithmetic

Q1_ram_rom_addr_reg[7] = AMPP_FUNCTION(A1L5, Q1_ram_rom_addr_reg[7], Q1_ram_rom_addr_reg[8], !F1_Q[0], Q1L11, Q1L92, Q1L43, Q1L53);

--Q1L73 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]~169 at LC_X16_Y6_N7
--operation mode is arithmetic

Q1L73 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[7], Q1L43);

--Q1L83 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]~169COUT1_187 at LC_X16_Y6_N7
--operation mode is arithmetic

Q1L83 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[7], Q1L53);


--Q1_ram_rom_addr_reg[8] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8] at LC_X16_Y6_N8
--operation mode is arithmetic

Q1_ram_rom_addr_reg[8] = AMPP_FUNCTION(A1L5, Q1_ram_rom_addr_reg[8], Q1_ram_rom_addr_reg[9], !F1_Q[0], Q1L11, Q1L92, Q1L73, Q1L83);

--Q1L04 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]~173 at LC_X16_Y6_N8
--operation mode is arithmetic

Q1L04 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[8], Q1L73);

--Q1L14 is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]~173COUT1_188 at LC_X16_Y6_N8
--operation mode is arithmetic

Q1L14 = AMPP_FUNCTION(Q1_ram_rom_addr_reg[8], Q1L83);


--Q1_ram_rom_addr_reg[9] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[9] at LC_X16_Y6_N9
--operation mode is normal

Q1_ram_rom_addr_reg[9] = AMPP_FUNCTION(A1L5, Q1_ram_rom_addr_reg[9], altera_internal_jtag, !F1_Q[0], Q1L11, Q1L92, Q1L04, Q1L14);


--Q1_ram_rom_data_reg[1] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1] at LC_X17_Y6_N2
--operation mode is normal

Q1_ram_rom_data_reg[1] = AMPP_FUNCTION(A1L5, Q1_ram_rom_data_reg[2], Q1L21, P1_q_b[1], VCC, Q1L25);


--Q1_ram_rom_data_reg[2] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2] at LC_X17_Y6_N6
--operation mode is normal

Q1_ram_rom_data_reg[2] = AMPP_FUNCTION(A1L5, P1_q_b[2], Q1L21, Q1_ram_rom_data_reg[3], VCC, Q1L25);


--Q1_ram_rom_data_reg[3] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3] at LC_X18_Y7_N4
--operation mode is normal

Q1_ram_rom_data_reg[3] = AMPP_FUNCTION(A1L5, Q1_ram_rom_data_reg[4], Q1L21, P1_q_b[3], VCC, Q1L25);


--Q1_ram_rom_data_reg[4] is data_rom:u3|altsyncram:altsyncram_component|altsyncram_cfu:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4] at LC_X18_Y7_N1
--operation mode is normal