light.map.rpt

自己写的一个VHDL程序

+----------------------+----------------------+
; Logic cells          ; 82                   ;
; Total registers      ; 63                   ;
; I/O pins             ; 23                   ;
; Shareable expanders  ; 17                   ;
; Parallel expanders   ; 11                   ;
; Maximum fan-out node ; predevide2:inst9|Clk ;
; Maximum fan-out      ; 26                   ;
; Total fan-out        ; 879                  ;
; Average fan-out      ; 7.20                 ;
+----------------------+----------------------+


+-----------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                   ;
+-----------------------------------+------------+------+------------------------------------------------+--------------+
; Compilation Hierarchy Node        ; Macrocells ; Pins ; Full Hierarchy Name                            ; Library Name ;
+-----------------------------------+------------+------+------------------------------------------------+--------------+
; |light                            ; 82         ; 23   ; |light                                         ; work         ;
;    |FreDevide10:inst8|            ; 4          ; 0    ; |light|FreDevide10:inst8                       ; work         ;
;    |controller:inst|              ; 16         ; 0    ; |light|controller:inst                         ; work         ;
;    |counter:inst1|                ; 6          ; 0    ; |light|counter:inst1                           ; work         ;
;    |display:inst2|                ; 12         ; 0    ; |light|display:inst2                           ; work         ;
;       |lpm_counter:timeout_rtl_0| ; 6          ; 0    ; |light|display:inst2|lpm_counter:timeout_rtl_0 ; work         ;
;    |display:inst5|                ; 16         ; 0    ; |light|display:inst5                           ; work         ;
;       |lpm_counter:timeout_rtl_1| ; 5          ; 0    ; |light|display:inst5|lpm_counter:timeout_rtl_1 ; work         ;
;    |fenwei:inst3|                 ; 0          ; 0    ; |light|fenwei:inst3                            ; work         ;
;    |predevide2:inst9|             ; 22         ; 0    ; |light|predevide2:inst9                        ; work         ;
+-----------------------------------+------------+------+------------------------------------------------+--------------+


+---------------------------------------------------------------------------------------------------------------+
; Registers Removed During Synthesis                                                                            ;
+-------------------------------------------------+-------------------------------------------------------------+
; Register name                                   ; Reason for Removal                                          ;
+-------------------------------------------------+-------------------------------------------------------------+
; display:inst5|display[0]                        ; Stuck at VCC due to stuck port data_in                      ;
; display:inst2|display[0]                        ; Stuck at VCC due to stuck port data_in                      ;
; controller:inst|redb                            ; Stuck at VCC due to stuck port data_in                      ;
; controller:inst|greenb                          ; Stuck at GND due to stuck port data_in                      ;
; controller:inst|yellowb                         ; Stuck at GND due to stuck port data_in                      ;
; display:inst2|display[6]                        ; Stuck at GND due to stuck port data_in                      ;
; display:inst5|lpm_counter:timeout_rtl_1|dffs[0] ; Merged with display:inst2|lpm_counter:timeout_rtl_0|dffs[0] ;
; Total Number of Removed Registers = 7           ;                                                             ;
+-------------------------------------------------+-------------------------------------------------------------+


+----------------------------------------------------------------+
; Source assignments for display:inst2|lpm_counter:timeout_rtl_0 ;
+---------------------------+-------+------+---------------------+
; Assignment                ; Value ; From ; To                  ;
+---------------------------+-------+------+---------------------+
; SUPPRESS_DA_RULE_INTERNAL ; a101  ; -    ; -                   ;
; SUPPRESS_DA_RULE_INTERNAL ; s102  ; -    ; -                   ;
; SUPPRESS_DA_RULE_INTERNAL ; s103  ; -    ; -                   ;
+---------------------------+-------+------+---------------------+


+----------------------------------------------------------------+
; Source assignments for display:inst5|lpm_counter:timeout_rtl_1 ;
+---------------------------+-------+------+---------------------+
; Assignment                ; Value ; From ; To                  ;
+---------------------------+-------+------+---------------------+
; SUPPRESS_DA_RULE_INTERNAL ; a101  ; -    ; -                   ;
; SUPPRESS_DA_RULE_INTERNAL ; s102  ; -    ; -                   ;
; SUPPRESS_DA_RULE_INTERNAL ; s103  ; -    ; -                   ;
+---------------------------+-------+------+---------------------+


+---------------------------------------------------------------------+
; Source assignments for counter:inst1|lpm_add_sub:Add0|addcore:adder ;
+---------------------------+-------+------+--------------------------+
; Assignment                ; Value ; From ; To                       ;
+---------------------------+-------+------+--------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; A103  ; -    ; -                        ;
+---------------------------+-------+------+--------------------------+


+--------------------------------------------------------------------------------------+
; Source assignments for counter:inst1|lpm_add_sub:Add0|addcore:adder|addcore:adder[0] ;
+---------------------------+-------+------+-------------------------------------------+
; Assignment                ; Value ; From ; To                                        ;
+---------------------------+-------+------+-------------------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; A103  ; -    ; -                                         ;
+---------------------------+-------+------+-------------------------------------------+


+-----------------------------------------------------------------------+
; Source assignments for controller:inst|lpm_add_sub:Add2|addcore:adder ;
+---------------------------+-------+------+----------------------------+
; Assignment                ; Value ; From ; To                         ;
+---------------------------+-------+------+----------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; A103  ; -    ; -                          ;
+---------------------------+-------+------+----------------------------+


+----------------------------------------------------------------------------------------+
; Source assignments for controller:inst|lpm_add_sub:Add2|addcore:adder|addcore:adder[0] ;
+---------------------------+-------+------+---------------------------------------------+
; Assignment                ; Value ; From ; To                                          ;
+---------------------------+-------+------+---------------------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; A103  ; -    ; -                                           ;
+---------------------------+-------+------+---------------------------------------------+


+---------------------------------------------------------------------------+
; Source assignments for predevide2:inst9|lpm_add_sub:Add0|addcore:adder[2] ;
+---------------------------+-------+------+--------------------------------+
; Assignment                ; Value ; From ; To                             ;
+---------------------------+-------+------+--------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; A103  ; -    ; -                              ;
+---------------------------+-------+------+--------------------------------+


+---------------------------------------------------------------------------+
; Source assignments for predevide2:inst9|lpm_add_sub:Add0|addcore:adder[1] ;
+---------------------------+-------+------+--------------------------------+
; Assignment                ; Value ; From ; To                             ;
+---------------------------+-------+------+--------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; A103  ; -    ; -                              ;
+---------------------------+-------+------+--------------------------------+


+---------------------------------------------------------------------------+
; Source assignments for predevide2:inst9|lpm_add_sub:Add0|addcore:adder[0] ;
+---------------------------+-------+------+--------------------------------+
; Assignment                ; Value ; From ; To                             ;
+---------------------------+-------+------+--------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; A103  ; -    ; -                              ;
+---------------------------+-------+------+--------------------------------+


+------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: display:inst2|lpm_counter:timeout_rtl_0 ;
+------------------------+-------------------+---------------------------------------------+
; Parameter Name         ; Value             ; Type                                        ;
+------------------------+-------------------+---------------------------------------------+
; AUTO_CARRY_CHAINS      ; ON                ; AUTO_CARRY                                  ;
; IGNORE_CARRY_BUFFERS   ; OFF               ; IGNORE_CARRY                                ;
; AUTO_CASCADE_CHAINS    ; ON                ; AUTO_CASCADE                                ;
; IGNORE_CASCADE_BUFFERS ; OFF               ; IGNORE_CASCADE                              ;
; LPM_WIDTH              ; 6                 ; Untyped                                     ;
; LPM_DIRECTION          ; UP                ; Untyped                                     ;
; LPM_MODULUS            ; 0                 ; Untyped                                     ;
; LPM_AVALUE             ; UNUSED            ; Untyped                                     ;
; LPM_SVALUE             ; UNUSED            ; Untyped                                     ;
; LPM_PORT_UPDOWN        ; PORT_CONNECTIVITY ; Untyped                                     ;
; DEVICE_FAMILY          ; MAX7000S          ; Untyped                                     ;
; CARRY_CHAIN            ; MANUAL            ; Untyped                                     ;
; CARRY_CHAIN_LENGTH     ; 48                ; CARRY_CHAIN_LENGTH                          ;
; NOT_GATE_PUSH_BACK     ; ON                ; NOT_GATE_PUSH_BACK                          ;
; CARRY_CNT_EN           ; SMART             ; Untyped                                     ;
; LABWIDE_SCLR           ; ON                ; Untyped                                     ;
; USE_NEW_VERSION        ; TRUE              ; Untyped                                     ;
; CBXI_PARAMETER         ; NOTHING           ; Untyped                                     ;
+------------------------+-------------------+---------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".