up3_clock.fit.summary

采用vhdl语言编写的UP3开发板电子钟程序。在quartus中编译完成。

Fitter Status : Successful - Mon Jun 02 03:44:16 2008
Quartus II Version : 6.0 Build 202 06/20/2006 SP 1 SJ Full Version
Revision Name : UP3_CLOCK
Top-level Entity Name : UP3_CLOCK
Family : Cyclone
Device : EP1C6Q240C8
Timing Models : Final
Total logic elements : 629 / 5,980 ( 11 % )
Total pins : 24 / 185 ( 13 % )
Total virtual pins : 0
Total memory bits : 0 / 92,160 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )