sine64.fit.rpt

chdl 64位计数器

; Name                                ; Location     ; Fan-Out ; Global Resource Used ; Global Line Name ;
+-------------------------------------+--------------+---------+----------------------+------------------+
; clk                                 ; PIN_93       ; 8       ; Global clock         ; GCLK6            ;
; cnt64:inst|74161:inst|f74161:sub|99 ; LC_X12_Y1_N3 ; 7       ; Global clock         ; GCLK3            ;
+-------------------------------------+--------------+---------+----------------------+------------------+


+---------------------------------------------------------------------------------------------+
; Non-Global High Fan-Out Signals                                                             ;
+-----------------------------------------------------------------------------------+---------+
; Name                                                                              ; Fan-Out ;
+-----------------------------------------------------------------------------------+---------+
; cnt64:inst|74161:inst|f74161:sub|82~3                                             ; 2       ;
; cnt64:inst|74161:inst|f74161:sub|87                                               ; 2       ;
; cnt64:inst|74161:inst|f74161:sub|9                                                ; 2       ;
; cnt64:inst|74161:inst1|f74161:sub|110                                             ; 2       ;
; cnt64:inst|74161:inst1|f74161:sub|99                                              ; 2       ;
; cnt64:inst|74161:inst1|f74161:sub|87                                              ; 2       ;
; cnt64:inst|74161:inst1|f74161:sub|9                                               ; 2       ;
; cnt64:inst|74161:inst|f74161:sub|82~2COUT1_7                                      ; 1       ;
; cnt64:inst|74161:inst|f74161:sub|82~2                                             ; 1       ;
; cnt64:inst|74161:inst|f74161:sub|82~1                                             ; 1       ;
; cnt64:inst|74161:inst|f74161:sub|85~COUT1_2                                       ; 1       ;
; cnt64:inst|74161:inst|f74161:sub|85                                               ; 1       ;
; cnt64:inst|74161:inst|f74161:sub|81~COUT1                                         ; 1       ;
; cnt64:inst|74161:inst|f74161:sub|81                                               ; 1       ;
; cnt64:inst|74161:inst1|f74161:sub|105~COUT1_2                                     ; 1       ;
; cnt64:inst|74161:inst1|f74161:sub|105                                             ; 1       ;
; cnt64:inst|74161:inst1|f74161:sub|95~COUT1_2                                      ; 1       ;
; cnt64:inst|74161:inst1|f74161:sub|95                                              ; 1       ;
; cnt64:inst|74161:inst1|f74161:sub|85~COUT1                                        ; 1       ;
; cnt64:inst|74161:inst1|f74161:sub|85                                              ; 1       ;
; cnt64:inst|74161:inst1|f74161:sub|81~COUT1_3                                      ; 1       ;
; cnt64:inst|74161:inst1|f74161:sub|81                                              ; 1       ;
; rom64:inst1|altsyncram:altsyncram_component|altsyncram_8v21:auto_generated|q_a[6] ; 1       ;
; rom64:inst1|altsyncram:altsyncram_component|altsyncram_8v21:auto_generated|q_a[5] ; 1       ;
; rom64:inst1|altsyncram:altsyncram_component|altsyncram_8v21:auto_generated|q_a[4] ; 1       ;
; rom64:inst1|altsyncram:altsyncram_component|altsyncram_8v21:auto_generated|q_a[3] ; 1       ;
; rom64:inst1|altsyncram:altsyncram_component|altsyncram_8v21:auto_generated|q_a[2] ; 1       ;
; rom64:inst1|altsyncram:altsyncram_component|altsyncram_8v21:auto_generated|q_a[1] ; 1       ;
; rom64:inst1|altsyncram:altsyncram_component|altsyncram_8v21:auto_generated|q_a[0] ; 1       ;
; rom64:inst1|altsyncram:altsyncram_component|altsyncram_8v21:auto_generated|q_a[7] ; 1       ;
+-----------------------------------------------------------------------------------+---------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter RAM Summary                                                                                                                                                                                                                                                                                                                                                                                                                                           ;
+---------------------------------------------------------------------------------------+------+------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+-------------+------------+
; Name                                                                                  ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Port A Input Registers ; Port A Output Registers ; Port B Input Registers ; Port B Output Registers ; Size ; Implementation Port A Depth ; Implementation Port A Width ; Implementation Port B Depth ; Implementation Port B Width ; Implementation Bits ; M4Ks ; MIF         ; Location   ;
+---------------------------------------------------------------------------------------+------+------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+-------------+------------+
; rom64:inst1|altsyncram:altsyncram_component|altsyncram_8v21:auto_generated|ALTSYNCRAM ; AUTO ; ROM  ; 64           ; 8            ; --           ; --           ; yes                    ; yes                     ; --                     ; --                      ; 512  ; 64                          ; 8                           ; --                          ; --                          ; 512                 ; 1    ; sine641.mif ; M4K_X13_Y1 ;
+---------------------------------------------------------------------------------------+------+------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+-------------+------------+
Note: Fitter may spread logical memories into multiple blocks to improve timing. The actual required RAM blocks can be found in the Fitter Resource Usage section.


+----------------------------------------------------+
; Interconnect Usage Summary                         ;
+----------------------------+-----------------------+
; Interconnect Resource Type ; Usage                 ;
+----------------------------+-----------------------+
; C4s                        ; 10 / 8,840 ( < 1 % )  ;
; Direct links               ; 0 / 11,506 ( 0 % )    ;
; Global clocks              ; 2 / 8 ( 25 % )        ;
; LAB clocks                 ; 3 / 156 ( 2 % )       ;
; LUT chains                 ; 0 / 2,619 ( 0 % )     ;
; Local interconnects        ; 15 / 11,506 ( < 1 % ) ;
; M4K buffers                ; 8 / 468 ( 2 % )       ;
; R4s                        ; 25 / 7,520 ( < 1 % )  ;
+----------------------------+-----------------------+


+--------------------------------------------------------------------------+
; LAB Logic Elements                                                       ;
+--------------------------------------------+-----------------------------+
; Number of Logic Elements  (Average = 9.00) ; Number of LABs  (Total = 1) ;
+--------------------------------------------+-----------------------------+
; 1                                          ; 0                           ;
; 2                                          ; 0                           ;
; 3                                          ; 0                           ;
; 4                                          ; 0                           ;
; 5                                          ; 0                           ;
; 6                                          ; 0                           ;
; 7                                          ; 0                           ;
; 8                                          ; 0                           ;
; 9                                          ; 1                           ;
; 10                                         ; 0                           ;
+--------------------------------------------+-----------------------------+


+------------------------------------------------------------------+
; LAB-wide Signals                                                 ;
+------------------------------------+-----------------------------+
; LAB-wide Signals  (Average = 1.00) ; Number of LABs  (Total = 1) ;
+------------------------------------+-----------------------------+
; 1 Clock                            ; 1                           ;
+------------------------------------+-----------------------------+


+---------------------------------------------------------------------------+
; LAB Signals Sourced                                                       ;
+---------------------------------------------+-----------------------------+
; Number of Signals Sourced  (Average = 9.00) ; Number of LABs  (Total = 1) ;
+---------------------------------------------+-----------------------------+
; 0                                           ; 0                           ;
; 1                                           ; 0