uart.fit.qmsg

用ＦＰＧＡ

{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "4.813 ns register register " "Info: Estimated most critical path is register to register delay of 4.813 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns baud:inst\|cnt\[0\] 1 REG LAB_X34_Y9 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X34_Y9; Fanout = 2; REG Node = 'baud:inst\|cnt\[0\]'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { baud:inst|cnt[0] } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.645 ns) + CELL(0.414 ns) 1.059 ns baud:inst\|Add0~2057 2 COMB LAB_X35_Y9 2 " "Info: 2: + IC(0.645 ns) + CELL(0.414 ns) = 1.059 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2057'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.059 ns" { baud:inst|cnt[0] baud:inst|Add0~2057 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.130 ns baud:inst\|Add0~2059 3 COMB LAB_X35_Y9 2 " "Info: 3: + IC(0.000 ns) + CELL(0.071 ns) = 1.130 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2059'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2057 baud:inst|Add0~2059 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.201 ns baud:inst\|Add0~2061 4 COMB LAB_X35_Y9 2 " "Info: 4: + IC(0.000 ns) + CELL(0.071 ns) = 1.201 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2061'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2059 baud:inst|Add0~2061 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.272 ns baud:inst\|Add0~2063 5 COMB LAB_X35_Y9 2 " "Info: 5: + IC(0.000 ns) + CELL(0.071 ns) = 1.272 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2063'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2061 baud:inst|Add0~2063 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.343 ns baud:inst\|Add0~2065 6 COMB LAB_X35_Y9 2 " "Info: 6: + IC(0.000 ns) + CELL(0.071 ns) = 1.343 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2065'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2063 baud:inst|Add0~2065 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.414 ns baud:inst\|Add0~2067 7 COMB LAB_X35_Y9 2 " "Info: 7: + IC(0.000 ns) + CELL(0.071 ns) = 1.414 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2067'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2065 baud:inst|Add0~2067 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.485 ns baud:inst\|Add0~2069 8 COMB LAB_X35_Y9 2 " "Info: 8: + IC(0.000 ns) + CELL(0.071 ns) = 1.485 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2069'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2067 baud:inst|Add0~2069 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.556 ns baud:inst\|Add0~2071 9 COMB LAB_X35_Y9 2 " "Info: 9: + IC(0.000 ns) + CELL(0.071 ns) = 1.556 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2071'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2069 baud:inst|Add0~2071 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.627 ns baud:inst\|Add0~2073 10 COMB LAB_X35_Y9 2 " "Info: 10: + IC(0.000 ns) + CELL(0.071 ns) = 1.627 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2073'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2071 baud:inst|Add0~2073 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.698 ns baud:inst\|Add0~2075 11 COMB LAB_X35_Y9 2 " "Info: 11: + IC(0.000 ns) + CELL(0.071 ns) = 1.698 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2075'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2073 baud:inst|Add0~2075 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.769 ns baud:inst\|Add0~2077 12 COMB LAB_X35_Y9 2 " "Info: 12: + IC(0.000 ns) + CELL(0.071 ns) = 1.769 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2077'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2075 baud:inst|Add0~2077 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.840 ns baud:inst\|Add0~2079 13 COMB LAB_X35_Y9 2 " "Info: 13: + IC(0.000 ns) + CELL(0.071 ns) = 1.840 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2079'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2077 baud:inst|Add0~2079 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.911 ns baud:inst\|Add0~2081 14 COMB LAB_X35_Y9 2 " "Info: 14: + IC(0.000 ns) + CELL(0.071 ns) = 1.911 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2081'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2079 baud:inst|Add0~2081 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.982 ns baud:inst\|Add0~2083 15 COMB LAB_X35_Y9 2 " "Info: 15: + IC(0.000 ns) + CELL(0.071 ns) = 1.982 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2083'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2081 baud:inst|Add0~2083 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.053 ns baud:inst\|Add0~2085 16 COMB LAB_X35_Y9 2 " "Info: 16: + IC(0.000 ns) + CELL(0.071 ns) = 2.053 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2085'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2083 baud:inst|Add0~2085 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.124 ns baud:inst\|Add0~2087 17 COMB LAB_X35_Y9 2 " "Info: 17: + IC(0.000 ns) + CELL(0.071 ns) = 2.124 ns; Loc. = LAB_X35_Y9; Fanout = 2; COMB Node = 'baud:inst\|Add0~2087'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2085 baud:inst|Add0~2087 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.090 ns) + CELL(0.071 ns) 2.285 ns baud:inst\|Add0~2089 18 COMB LAB_X35_Y8 2 " "Info: 18: + IC(0.090 ns) + CELL(0.071 ns) = 2.285 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2089'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.161 ns" { baud:inst|Add0~2087 baud:inst|Add0~2089 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.356 ns baud:inst\|Add0~2091 19 COMB LAB_X35_Y8 2 " "Info: 19: + IC(0.000 ns) + CELL(0.071 ns) = 2.356 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2091'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2089 baud:inst|Add0~2091 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.427 ns baud:inst\|Add0~2093 20 COMB LAB_X35_Y8 2 " "Info: 20: + IC(0.000 ns) + CELL(0.071 ns) = 2.427 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2093'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2091 baud:inst|Add0~2093 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.498 ns baud:inst\|Add0~2095 21 COMB LAB_X35_Y8 2 " "Info: 21: + IC(0.000 ns) + CELL(0.071 ns) = 2.498 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2095'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2093 baud:inst|Add0~2095 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.569 ns baud:inst\|Add0~2097 22 COMB LAB_X35_Y8 2 " "Info: 22: + IC(0.000 ns) + CELL(0.071 ns) = 2.569 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2097'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2095 baud:inst|Add0~2097 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.640 ns baud:inst\|Add0~2099 23 COMB LAB_X35_Y8 2 " "Info: 23: + IC(0.000 ns) + CELL(0.071 ns) = 2.640 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2099'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2097 baud:inst|Add0~2099 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.711 ns baud:inst\|Add0~2101 24 COMB LAB_X35_Y8 2 " "Info: 24: + IC(0.000 ns) + CELL(0.071 ns) = 2.711 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2101'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2099 baud:inst|Add0~2101 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.782 ns baud:inst\|Add0~2103 25 COMB LAB_X35_Y8 2 " "Info: 25: + IC(0.000 ns) + CELL(0.071 ns) = 2.782 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2103'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2101 baud:inst|Add0~2103 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.853 ns baud:inst\|Add0~2105 26 COMB LAB_X35_Y8 2 " "Info: 26: + IC(0.000 ns) + CELL(0.071 ns) = 2.853 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2105'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2103 baud:inst|Add0~2105 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.924 ns baud:inst\|Add0~2107 27 COMB LAB_X35_Y8 2 " "Info: 27: + IC(0.000 ns) + CELL(0.071 ns) = 2.924 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2107'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2105 baud:inst|Add0~2107 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.995 ns baud:inst\|Add0~2109 28 COMB LAB_X35_Y8 2 " "Info: 28: + IC(0.000 ns) + CELL(0.071 ns) = 2.995 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2109'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2107 baud:inst|Add0~2109 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.066 ns baud:inst\|Add0~2111 29 COMB LAB_X35_Y8 2 " "Info: 29: + IC(0.000 ns) + CELL(0.071 ns) = 3.066 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2111'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2109 baud:inst|Add0~2111 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.137 ns baud:inst\|Add0~2113 30 COMB LAB_X35_Y8 2 " "Info: 30: + IC(0.000 ns) + CELL(0.071 ns) = 3.137 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2113'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2111 baud:inst|Add0~2113 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.208 ns baud:inst\|Add0~2115 31 COMB LAB_X35_Y8 2 " "Info: 31: + IC(0.000 ns) + CELL(0.071 ns) = 3.208 ns; Loc. = LAB_X35_Y8; Fanout = 2; COMB Node = 'baud:inst\|Add0~2115'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2113 baud:inst|Add0~2115 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.279 ns baud:inst\|Add0~2117 32 COMB LAB_X35_Y8 1 " "Info: 32: + IC(0.000 ns) + CELL(0.071 ns) = 3.279 ns; Loc. = LAB_X35_Y8; Fanout = 1; COMB Node = 'baud:inst\|Add0~2117'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { baud:inst|Add0~2115 baud:inst|Add0~2117 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.410 ns) 3.689 ns baud:inst\|Add0~2118 33 COMB LAB_X35_Y8 1 " "Info: 33: + IC(0.000 ns) + CELL(0.410 ns) = 3.689 ns; Loc. = LAB_X35_Y8; Fanout = 1; COMB Node = 'baud:inst\|Add0~2118'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.410 ns" { baud:inst|Add0~2117 baud:inst|Add0~2118 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.890 ns) + CELL(0.150 ns) 4.729 ns baud:inst\|Add0~2140 34 COMB LAB_X36_Y9 1 " "Info: 34: + IC(0.890 ns) + CELL(0.150 ns) = 4.729 ns; Loc. = LAB_X36_Y9; Fanout = 1; COMB Node = 'baud:inst\|Add0~2140'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.040 ns" { baud:inst|Add0~2118 baud:inst|Add0~2140 } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 27 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.084 ns) 4.813 ns baud:inst\|cnt\[31\] 35 REG LAB_X36_Y9 34 " "Info: 35: + IC(0.000 ns) + CELL(0.084 ns) = 4.813 ns; Loc. = LAB_X36_Y9; Fanout = 34; REG Node = 'baud:inst\|cnt\[31\]'" {  } { { "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.084 ns" { baud:inst|Add0~2140 baud:inst|cnt[31] } "NODE_NAME" } } { "baud.vhd" "" { Text "E:/My_Design/VHDL/Uart/baud.vhd" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0