tb_block_32_systolic.v

来自「脉动乘法器：一个GF(2m)域上的Digit-Serial 脉动结构（Systo」· Verilog 代码 · 共 46 行

//////////////////////////////////////////////////////////////////////////////////////
//	Name					Test Bench for block_32_systolic.v                                            //
//	Version				1.0																								  		  				//
//	Author				Karl																															//
//	Date					Dec 23																														//
//	Character			Test Bench for block_32_systolic.v                                        //
//	Changes				Original Version                                   								//
//////////////////////////////////////////////////////////////////////////////////////

module Test_block_32_systolic;

reg  [31:0] Ai, Bi, Gi;
reg  [62:0] Pi;
reg         clk, ctrl;
wire [31:0] Ao, Go;
wire [62:0] Po;
wire        ctrlo;
sys_block_32 U_Test_sys_block_32_systolic (.clk(clk), .Ai(Ai), .Bi(Bi), .Gi(Gi), .Pi(Pi), .ctrli(ctrl), .Ao(Ao), .Go(Go), .Po(Po), .ctrlo(ctrlo));

always #5 clk = ~ clk;

initial
  begin
    clk  = 1;
    #10
    ctrl = 0;
    #10 // No.07
    Ai   = 32'h8000_0005; // x^255
    Gi   = 32'h0000_0001;
    Bi   = 32'h2; 
    Pi   = 63'b0;
    #10
    ctrl = 1;
    #10 // No.06
    Ai   = 32'h8000_0005; // 
    Gi   = 32'h0000_0001; // 
    Bi   = 32'h2;   
    #50
    $stop;
  end

endmodule