block32_systolic.v

脉动乘法器：一个GF(2m)域上的Digit-Serial 脉动结构（Systolic）的乘法器

//////////////////////////////////////////////////////////////////////////////////////
//	Name          32 bit block used in systolic array                               //
//	Version       1.0																															  //
//	Author        Marko, Karl                                                       //
//	Date          Dec 23																														//
//	Character     discribed as in fig 9                                             //
//	Changes       Original Version                                                  //
//////////////////////////////////////////////////////////////////////////////////////

module sys_block_32 (clk, Ai, Bi, Gi, Pi, ctrli, Ao, Go, Po, ctrlo);

input  [31:0] Ai, Bi, Gi;
input  [62:0] Pi;
input         ctrli, clk;
output [31:0] Ao, Go;
output [62:0] Po;
output        ctrlo;

reg    [31:0] Ao, Go;
reg           ctrlo;
wire   [62:0] Po;

wire   [31:0] wp, wg, wa, wh, ws;
wire   [30:0] wr;   
reg    [31:0] wt;
reg    [30:0] Poh;

always @ (posedge clk)
  begin
    wt [31:0] <= wh[31:0];
    ctrlo     <= ctrli;
    Go [31:0] <= wg[31:0];
    Ao [31:0] <= wa[31:0];
    Poh[30:0] <= wr[30:0];
  end

Block32s u_matrix_block32 (.ai(Ai), .bi(Bi), .gi(Gi), .ti1({wt[31], wh[30:0]}), .ti2(wp), .ti3(Pi[62:32]), .ao(wa), .go(wg), .to1(ws), .to2(wr));

mux_2 u_mux_00 (.ctrl(ctrli), .i0(Pi[ 0]), .i1(wt[31]), .o(wh[31]));
mux_2 u_mux_01 (.ctrl(ctrlo), .i0(ws[31]), .i1(wt[30]), .o(wh[30]));
mux_2 u_mux_02 (.ctrl(ctrlo), .i0(ws[30]), .i1(wt[29]), .o(wh[29]));
mux_2 u_mux_03 (.ctrl(ctrlo), .i0(ws[29]), .i1(wt[28]), .o(wh[28]));
mux_2 u_mux_04 (.ctrl(ctrlo), .i0(ws[28]), .i1(wt[27]), .o(wh[27]));
mux_2 u_mux_05 (.ctrl(ctrlo), .i0(ws[27]), .i1(wt[26]), .o(wh[26]));
mux_2 u_mux_06 (.ctrl(ctrlo), .i0(ws[26]), .i1(wt[25]), .o(wh[25]));
mux_2 u_mux_07 (.ctrl(ctrlo), .i0(ws[25]), .i1(wt[24]), .o(wh[24]));
mux_2 u_mux_08 (.ctrl(ctrlo), .i0(Pi[24]), .i1(wt[23]), .o(wh[23]));
mux_2 u_mux_09 (.ctrl(ctrlo), .i0(ws[23]), .i1(wt[22]), .o(wh[22]));
mux_2 u_mux_10 (.ctrl(ctrlo), .i0(ws[22]), .i1(wt[21]), .o(wh[21]));
mux_2 u_mux_11 (.ctrl(ctrlo), .i0(ws[21]), .i1(wt[20]), .o(wh[20]));
mux_2 u_mux_12 (.ctrl(ctrlo), .i0(ws[20]), .i1(wt[19]), .o(wh[19]));
mux_2 u_mux_13 (.ctrl(ctrlo), .i0(ws[19]), .i1(wt[18]), .o(wh[18]));
mux_2 u_mux_14 (.ctrl(ctrlo), .i0(ws[18]), .i1(wt[17]), .o(wh[17]));
mux_2 u_mux_15 (.ctrl(ctrlo), .i0(ws[17]), .i1(wt[16]), .o(wh[16]));
mux_2 u_mux_16 (.ctrl(ctrli), .i0(Pi[16]), .i1(wt[15]), .o(wh[15]));
mux_2 u_mux_17 (.ctrl(ctrlo), .i0(ws[15]), .i1(wt[14]), .o(wh[14]));
mux_2 u_mux_18 (.ctrl(ctrlo), .i0(ws[14]), .i1(wt[13]), .o(wh[13]));
mux_2 u_mux_19 (.ctrl(ctrlo), .i0(ws[13]), .i1(wt[12]), .o(wh[12]));
mux_2 u_mux_20 (.ctrl(ctrlo), .i0(ws[12]), .i1(wt[11]), .o(wh[11]));
mux_2 u_mux_21 (.ctrl(ctrlo), .i0(ws[11]), .i1(wt[10]), .o(wh[10]));
mux_2 u_mux_22 (.ctrl(ctrlo), .i0(ws[10]), .i1(wt[ 9]), .o(wh[ 9]));
mux_2 u_mux_23 (.ctrl(ctrlo), .i0(ws[ 9]), .i1(wt[ 8]), .o(wh[ 8]));
mux_2 u_mux_24 (.ctrl(ctrlo), .i0(Pi[ 8]), .i1(wt[ 7]), .o(wh[ 7]));
mux_2 u_mux_25 (.ctrl(ctrlo), .i0(ws[ 7]), .i1(wt[ 6]), .o(wh[ 6]));
mux_2 u_mux_26 (.ctrl(ctrlo), .i0(ws[ 6]), .i1(wt[ 5]), .o(wh[ 5]));
mux_2 u_mux_27 (.ctrl(ctrlo), .i0(ws[ 5]), .i1(wt[ 4]), .o(wh[ 4]));
mux_2 u_mux_28 (.ctrl(ctrlo), .i0(ws[ 4]), .i1(wt[ 3]), .o(wh[ 3]));
mux_2 u_mux_29 (.ctrl(ctrlo), .i0(ws[ 3]), .i1(wt[ 2]), .o(wh[ 2]));
mux_2 u_mux_30 (.ctrl(ctrlo), .i0(ws[ 2]), .i1(wt[ 1]), .o(wh[ 1]));
mux_2 u_mux_31 (.ctrl(ctrlo), .i0(ws[ 1]), .i1(wt[ 0]), .o(wh[ 0]));

and_2_32 u_and_array (.i1(Pi[31:0]), .i2(ctrli), .o(wp[31:0]));

assign Po[31:0]  =  ws[31:0];
assign Po[62:32] = Poh[30:0];

endmodule