block16_systolic.v

脉动乘法器：一个GF(2m)域上的Digit-Serial 脉动结构（Systolic）的乘法器

//////////////////////////////////////////////////////////////////////////////////////
//	Name          16 bit block used in systolic array                               //
//	Version       1.0																															  //
//	Author        Marko, Karl                                                       //
//	Date          Dec 23																														//
//	Character     discribed as in fig 9                                             //
//	Changes       Original Version                                                  //
//////////////////////////////////////////////////////////////////////////////////////

module sys_block_16 (clk, Ai, Bi, Gi, Pi, ctrli, Ao, Go, Po, ctrlo);

input  [15:0] Ai, Bi, Gi;
input  [30:0] Pi;
input         ctrli, clk;
output [15:0] Ao, Go;
output [30:0] Po;
output        ctrlo;

reg    [15:0] Ao, Go;
reg           ctrlo;
wire   [30:0] Po;

wire   [15:0] wp, wg, wa, wh, ws;
wire   [14:0] wr;   
reg    [15:0] wt;
reg    [14:0] Poh;

always @ (posedge clk)
  begin
    wt [15:0] <= wh[15:0];
    ctrlo     <= ctrli;
    Go [15:0] <= wg[15:0];
    Ao [15:0] <= wa[15:0];
    Poh[14:0] <= wr[14:0];
  end

Block16s u_matrix_block16 (.ai(Ai), .bi(Bi), .gi(Gi), .ti1({wt[15], wh[14:0]}), .ti2(wp), .ti3(Pi[30:16]), .ao(wa), .go(wg), .to1(ws), .to2(wr));

mux_2 u_mux_0 (.ctrl(ctrli), .i0(Pi[ 0]), .i1(wt[15]), .o(wh[15]));
mux_2 u_mux_1 (.ctrl(ctrlo), .i0(ws[15]), .i1(wt[14]), .o(wh[14]));
mux_2 u_mux_2 (.ctrl(ctrlo), .i0(ws[14]), .i1(wt[13]), .o(wh[13]));
mux_2 u_mux_3 (.ctrl(ctrlo), .i0(ws[13]), .i1(wt[12]), .o(wh[12]));
mux_2 u_mux_4 (.ctrl(ctrlo), .i0(ws[12]), .i1(wt[11]), .o(wh[11]));
mux_2 u_mux_5 (.ctrl(ctrlo), .i0(ws[11]), .i1(wt[10]), .o(wh[10]));
mux_2 u_mux_6 (.ctrl(ctrlo), .i0(ws[10]), .i1(wt[ 9]), .o(wh[ 9]));
mux_2 u_mux_7 (.ctrl(ctrlo), .i0(ws[ 9]), .i1(wt[ 8]), .o(wh[ 8]));
mux_2 u_mux_8 (.ctrl(ctrlo), .i0(Pi[ 8]), .i1(wt[ 7]), .o(wh[ 7]));
mux_2 u_mux_9 (.ctrl(ctrlo), .i0(ws[ 7]), .i1(wt[ 6]), .o(wh[ 6]));
mux_2 u_mux_A (.ctrl(ctrlo), .i0(ws[ 6]), .i1(wt[ 5]), .o(wh[ 5]));
mux_2 u_mux_B (.ctrl(ctrlo), .i0(ws[ 5]), .i1(wt[ 4]), .o(wh[ 4]));
mux_2 u_mux_C (.ctrl(ctrlo), .i0(ws[ 4]), .i1(wt[ 3]), .o(wh[ 3]));
mux_2 u_mux_D (.ctrl(ctrlo), .i0(ws[ 3]), .i1(wt[ 2]), .o(wh[ 2]));
mux_2 u_mux_E (.ctrl(ctrlo), .i0(ws[ 2]), .i1(wt[ 1]), .o(wh[ 1]));
mux_2 u_mux_F (.ctrl(ctrlo), .i0(ws[ 1]), .i1(wt[ 0]), .o(wh[ 0]));

and_2_16 u_and_array (.i1(Pi[15:0]), .i2(ctrli), .o(wp[15:0]));

assign Po[15:0]  =  ws[15:0];
assign Po[30:16] = Poh[14:0];

endmodule