📄 steppermotorports.v
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//////////////////////////////////////////////////////////////////////////////////////////////
//
// Verilog file generated by X-HDL - Revision 3.2.52 Mar. 28, 2005
// Mon Apr 25 11:12:48 2005
//
// Input file : D:/work/steppermotordrive/StepperMotorDrive.vhd
// Design name : StepperMotorPorts
// Author :
// Company :
//
// Description :
//
//
//////////////////////////////////////////////////////////////////////////////////////////////
//
// c2003 Franks Development, LLC
// http://www.franks-development.com
// !This source is distributed under the terms & conditions specified at opencores.org
//
// Please see the file "StepperMotorWiring.bmp" for info on connecting 4 & 6
// wire motors to your device. This source should drive either type, though connection
// to 4-wire motors requires significantly more FET's to buffer outputs. The
// circuitry for 6-wire motors is more straightforward. The colors specified are
// standard to many brands of stepper motors. If you get 1-2-3-4 on the FET's connected
// to 4-3-2-1 on your logic device (backwards), the motor will simply rotate backwards.
// if out of order, the motor won't rotate at all. Motors come in many dirrerent ratings
// of degrees rotation per step; some offer exceptional resolution very inexpensively.
//
// It is important to note that most logic operates at multiple megahertz. Given
// a steper motor at 100 steps per revolution, and a clock of 10MHz, running the
// motor at the full clock rate would equal 100,000 rps or 6 million revolutions per minute
// obviously, motors don't do this. Most steppers are designed for fine resolution at low
// speeds. Thus we employ a really big clock divider to get things operating at speeds
// of which the motor is capable. Check your motor ratings for a usefull value.
// in lieu of ratings, 100 rpm is usually achieveable, so plan accordingly.
//
// Another practical consideration is the threshold voltage of the FET's used to
// buffer the logic outputs & provide current drive to the motor. Most power
// FET's have a threshold voltage in the 5-12V range (or even higher),
// while logic devices now run in the 3.3V and lower range. Thus, you must be
// careful to choose a FET with a low threshold voltage, or a level-converter must
// be utilized between the logic output and the gate of the drive FET's.
// Practical tip: FET's with very high currect handling capabilities, in general
// (so be sure to read the datasheet before you buy), tend to handle larger currents
// for any given gate voltage. This means that in many cases, even if Vgs is rated at 5 volts
// if your stepper uses relatively low current, the FET's may still drive it at 3.3V or lower.
// In the worst case, you are likely going to need a high voltage power supply to drive the
// motors anyway, so you can "double-up" low power FET's to drive the gates of the power FET's
// with a higher voltage. In effect, the low-power FET's are wired as inverters with a low
// swithcing voltage. Contact Franks Development for a napkin-sketch if you aren't familiar
// with how to do that. Good luck.
//
// One of the most advantageous abilities of stepper motors is the ability to
// provide static holding force in any position. Of course this consumes power
// and heats the motor up significantly (though steppers are rated to handle this)
// use of the "static holding" input port will specify this behavior. Be aware,
// however, that the motor will dissipate power if left energized for long periods
// without (or without for that matter) rotating. This will make them hot! They are
// usually designed for it, but it is a consideration, especially if in a small,
// sealed, enclosure, excess heat may make your logic cease functioning correctly at
// some point.
module StepperMotorPorts (StepDrive, clock, Direction, StepEnable, ProvideStaticHolding);
output[3:0] StepDrive;
reg[3:0] StepDrive;
input clock;
input Direction;
input StepEnable;
input ProvideStaticHolding;
reg[1:0] state;
reg[31:0] StepCounter;
parameter[31:0] StepLockOut = 32'b00000000000000110000110101000000;
reg InternalStepEnable;
always @(clock)
begin
if ((clock == 1'b1))
begin
StepCounter <= StepCounter + 31'b0000000000000000000000000000001 ;
if (StepEnable == 1'b1)
begin
InternalStepEnable <= 1'b1 ;
end
if (StepCounter >= StepLockOut)
begin
StepCounter <= 32'b00000000000000000000000000000000 ;
if (ProvideStaticHolding == 1'b1)
begin
StepDrive <= 4'b0000 ;
end
else
begin
StepDrive <= 4'b1111 ;
end
if (InternalStepEnable == 1'b1)
begin
InternalStepEnable <= StepEnable ;
if (Direction == 1'b1)
begin
state <= state + 2'b01 ;
end
if (Direction == 1'b0)
begin
state <= state - 2'b01 ;
end
case (state)
2'b00 :
begin
StepDrive <= 4'b1010 ;
end
2'b01 :
begin
StepDrive <= 4'b1001 ;
end
2'b10 :
begin
StepDrive <= 4'b0101 ;
end
2'b11 :
begin
StepDrive <= 4'b0110 ;
end
default :
begin
end
endcase
end
end
end
end
endmodule
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