syn_tran.plg

来自「同步传输的vhdl实现」· PLG 代码 · 共 11 行

@P:  Worst Slack : 982.448
@P:  syn_tran|clk - Estimated Frequency : 57.0 MHz
@P:  syn_tran|clk - Requested Frequency : 1.0 MHz
@P:  syn_tran|clk - Estimated Period : 17.552
@P:  syn_tran|clk - Requested Period : 1000.000
@P:  syn_tran|clk - Slack : 982.448
@P:  Total Area : 378.0
@P:  Total Area : 157.0
@P:  Total Area : 221.0
@P:  Total Area : 378.0