num_2bits.vhd

这个是国外大学的项目代码

------------------------------------------------------------------------
--  num_2bits.vhd -- 
------------------------------------------------------------------------
--  Authors : Albert Zemba & Mihai Cucicea
------------------------------------------------------------------------
-- Software version: Xilinx ISE 7.1i 
--                   WebPack
------------------------------------------------------------------------
-- This source file contains the num_2bits component
------------------------------------------------------------------------
--  Behavioral description
-- A 2 bits counter
------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity num_2bits is
	port( clk:in std_logic;
			val:out std_logic_vector (1 downto 0)
		 );
end num_2bits;

architecture Behavioral of num_2bits is
begin

	process (clk)
	variable val1:std_logic_vector (1 downto 0):="00";
	begin
		if (clk='1' and clk'event) then
			val1:=val1+1;
			val<=val1;
		end if;
	end process;

end Behavioral;