⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 display_8_led.rpt

📁 这是我课程设计做的数字频率计的设计
💻 RPT
📖 第 1 页 / 共 3 页
字号:
         #  d22 &  _LC2_C11;

-- Node name is ':632' 
-- Equation name is '_LC8_C3', type is buried 
_LC8_C3  = LCELL( _EQ033);
  _EQ033 = !_LC5_C11 &  _LC7_C3
         #  d12 &  _LC5_C11;

-- Node name is ':641' 
-- Equation name is '_LC2_C16', type is buried 
_LC2_C16 = LCELL( _EQ034);
  _EQ034 =  d71 &  _LC1_C7
         # !_LC1_C7 &  num1;

-- Node name is ':644' 
-- Equation name is '_LC3_C16', type is buried 
_LC3_C16 = LCELL( _EQ035);
  _EQ035 =  _LC2_C16 & !_LC4_C11
         #  d61 &  _LC4_C11;

-- Node name is ':647' 
-- Equation name is '_LC4_C16', type is buried 
_LC4_C16 = LCELL( _EQ036);
  _EQ036 =  _LC3_C16 & !_LC8_C11
         #  d51 &  _LC8_C11;

-- Node name is ':650' 
-- Equation name is '_LC5_C16', type is buried 
_LC5_C16 = LCELL( _EQ037);
  _EQ037 = !_LC1_C11 &  _LC4_C16
         #  d41 &  _LC1_C11;

-- Node name is ':653' 
-- Equation name is '_LC6_C16', type is buried 
_LC6_C16 = LCELL( _EQ038);
  _EQ038 =  _LC5_C16 & !_LC6_C11
         #  d31 &  _LC6_C11;

-- Node name is ':656' 
-- Equation name is '_LC7_C16', type is buried 
_LC7_C16 = LCELL( _EQ039);
  _EQ039 = !_LC2_C11 &  _LC6_C16
         #  d21 &  _LC2_C11;

-- Node name is ':659' 
-- Equation name is '_LC8_C16', type is buried 
_LC8_C16 = LCELL( _EQ040);
  _EQ040 = !_LC5_C11 &  _LC7_C16
         #  d11 &  _LC5_C11;

-- Node name is ':668' 
-- Equation name is '_LC2_C19', type is buried 
_LC2_C19 = LCELL( _EQ041);
  _EQ041 =  d70 &  _LC1_C7
         # !_LC1_C7 &  num0;

-- Node name is ':671' 
-- Equation name is '_LC3_C19', type is buried 
_LC3_C19 = LCELL( _EQ042);
  _EQ042 =  _LC2_C19 & !_LC4_C11
         #  d60 &  _LC4_C11;

-- Node name is ':674' 
-- Equation name is '_LC4_C19', type is buried 
_LC4_C19 = LCELL( _EQ043);
  _EQ043 =  _LC3_C19 & !_LC8_C11
         #  d50 &  _LC8_C11;

-- Node name is ':677' 
-- Equation name is '_LC5_C19', type is buried 
_LC5_C19 = LCELL( _EQ044);
  _EQ044 = !_LC1_C11 &  _LC4_C19
         #  d40 &  _LC1_C11;

-- Node name is ':680' 
-- Equation name is '_LC6_C19', type is buried 
_LC6_C19 = LCELL( _EQ045);
  _EQ045 =  _LC5_C19 & !_LC6_C11
         #  d30 &  _LC6_C11;

-- Node name is ':683' 
-- Equation name is '_LC7_C19', type is buried 
_LC7_C19 = LCELL( _EQ046);
  _EQ046 = !_LC2_C11 &  _LC6_C19
         #  d20 &  _LC2_C11;

-- Node name is ':686' 
-- Equation name is '_LC8_C19', type is buried 
_LC8_C19 = LCELL( _EQ047);
  _EQ047 = !_LC5_C11 &  _LC7_C19
         #  d10 &  _LC5_C11;

-- Node name is ':867' 
-- Equation name is '_LC1_A14', type is buried 
_LC1_A14 = LCELL( _EQ048);
  _EQ048 = !num0 & !num1 & !num2 & !num3;

-- Node name is ':872' 
-- Equation name is '_LC3_A14', type is buried 
!_LC3_A14 = _LC3_A14~NOT;
_LC3_A14~NOT = LCELL( _EQ049);
  _EQ049 =  num1
         # !num0
         #  num3
         #  num2;

-- Node name is ':877' 
-- Equation name is '_LC2_A14', type is buried 
_LC2_A14 = LCELL( _EQ050);
  _EQ050 = !num0 &  num1 & !num2 & !num3;

-- Node name is ':882' 
-- Equation name is '_LC6_A14', type is buried 
!_LC6_A14 = _LC6_A14~NOT;
_LC6_A14~NOT = LCELL( _EQ051);
  _EQ051 = !num1
         # !num0
         #  num3
         #  num2;

-- Node name is ':887' 
-- Equation name is '_LC4_A14', type is buried 
!_LC4_A14 = _LC4_A14~NOT;
_LC4_A14~NOT = LCELL( _EQ052);
  _EQ052 =  num1
         #  num0
         #  num3
         # !num2;

-- Node name is ':892' 
-- Equation name is '_LC5_A14', type is buried 
!_LC5_A14 = _LC5_A14~NOT;
_LC5_A14~NOT = LCELL( _EQ053);
  _EQ053 =  num1
         # !num0
         #  num3
         # !num2;

-- Node name is ':897' 
-- Equation name is '_LC2_A23', type is buried 
_LC2_A23 = LCELL( _EQ054);
  _EQ054 = !num0 &  num1 &  num2 & !num3;

-- Node name is ':902' 
-- Equation name is '_LC4_A23', type is buried 
!_LC4_A23 = _LC4_A23~NOT;
_LC4_A23~NOT = LCELL( _EQ055);
  _EQ055 = !num1
         # !num0
         #  num3
         # !num2;

-- Node name is ':907' 
-- Equation name is '_LC3_A23', type is buried 
_LC3_A23 = LCELL( _EQ056);
  _EQ056 = !num0 & !num1 & !num2 &  num3;

-- Node name is ':912' 
-- Equation name is '_LC6_A23', type is buried 
!_LC6_A23 = _LC6_A23~NOT;
_LC6_A23~NOT = LCELL( _EQ057);
  _EQ057 =  num1
         # !num0
         # !num3
         #  num2;

-- Node name is ':1048' 
-- Equation name is '_LC4_A16', type is buried 
_LC4_A16 = LCELL( _EQ058);
  _EQ058 =  num1 &  num3
         #  num1 & !num2
         # !num0 &  num1
         # !num2 &  num3
         #  num0 &  num3
         # !num0 &  num2 & !num3
         #  num0 & !num1 &  num2;

-- Node name is ':1097' 
-- Equation name is '_LC7_A16', type is buried 
_LC7_A16 = LCELL( _EQ059);
  _EQ059 = !num2 &  num3
         # !num0 &  num3
         #  num1 &  num3
         # !num0 & !num1
         # !num1 &  num2 & !num3
         # !num0 &  num2;

-- Node name is '~1118~1' 
-- Equation name is '~1118~1', location is LC5_A23, type is buried.
-- synthesized logic cell 
_LC5_A23 = LCELL( _EQ060);
  _EQ060 =  num0 &  num1 &  num2 &  num3
         # !num0 &  num1 & !num2 &  num3;

-- Node name is ':1126' 
-- Equation name is '_LC8_A23', type is buried 
_LC8_A23 = LCELL( _EQ061);
  _EQ061 =  _LC5_A23 & !_LC6_A23
         # !_LC6_A23 &  _LC7_A23;

-- Node name is ':1130' 
-- Equation name is '_LC1_A23', type is buried 
_LC1_A23 = LCELL( _EQ062);
  _EQ062 =  _LC2_A23
         #  _LC3_A23 & !_LC4_A23
         # !_LC4_A23 &  _LC8_A23;

-- Node name is ':1144' 
-- Equation name is '_LC7_A14', type is buried 
_LC7_A14 = LCELL( _EQ063);
  _EQ063 =  _LC1_A23 & !_LC4_A14 & !_LC5_A14 & !_LC6_A14;

-- Node name is ':1148' 
-- Equation name is '_LC8_A14', type is buried 
_LC8_A14 = LCELL( _EQ064);
  _EQ064 =  _LC1_A14
         #  _LC2_A14 & !_LC3_A14
         # !_LC3_A14 &  _LC7_A14;

-- Node name is ':1166' 
-- Equation name is '_LC7_A23', type is buried 
_LC7_A23 = LCELL( _EQ065);
  _EQ065 =  num0 &  num1 & !num2 &  num3
         # !num1 &  num2 &  num3
         # !num0 &  num2 &  num3;

-- Node name is ':1199' 
-- Equation name is '_LC6_A16', type is buried 
_LC6_A16 = LCELL( _EQ066);
  _EQ066 =  num1 & !num2 & !num3
         # !num0 & !num2 & !num3
         # !num0 &  num1 & !num3
         # !num0 & !num1 & !num2
         # !num1 & !num2 &  num3
         #  num0 &  num1 & !num2
         # !num0 & !num1 &  num3
         #  num0 & !num1 &  num2
         # !num0 &  num1 &  num2;

-- Node name is ':1250' 
-- Equation name is '_LC1_A16', type is buried 
_LC1_A16 = LCELL( _EQ067);
  _EQ067 = !num1 & !num3
         #  num2 & !num3
         #  num0 & !num1
         # !num2 &  num3
         # !num1 & !num2
         #  num0 & !num2
         #  num0 & !num3;

-- Node name is ':1301' 
-- Equation name is '_LC8_A16', type is buried 
_LC8_A16 = LCELL( _EQ068);
  _EQ068 = !num2 & !num3
         # !num0 & !num1 & !num3
         #  num0 & !num1 &  num3
         # !num0 & !num2
         # !num1 & !num2
         #  num0 &  num1 & !num3;

-- Node name is ':1352' 
-- Equation name is '_LC3_A16', type is buried 
_LC3_A16 = LCELL( _EQ069);
  _EQ069 = !num0 & !num2
         # !num1 & !num2 &  num3
         #  num0 &  num2 & !num3
         #  num1 & !num3
         # !num0 &  num3
         # !num0 &  num1
         #  num1 &  num2;



Project Information                                    e:\s6\display_8_led.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:01
   Partitioner                            00:00:00
   Fitter                                 00:00:01
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:02


Memory Allocated
-----------------

Peak memory allocated during compilation  = 12,506K

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -