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📄 display_8_led.rpt

📁 这是我课程设计做的数字频率计的设计
💻 RPT
📖 第 1 页 / 共 3 页
字号:
   -      5     -    A    23        OR2    s           0    4    0    1  ~1118~1
   -      8     -    A    23        OR2                0    3    0    1  :1126
   -      1     -    A    23        OR2                0    4    0    1  :1130
   -      7     -    A    14       AND2                0    4    0    1  :1144
   -      8     -    A    14        OR2                0    4    1    0  :1148
   -      7     -    A    23        OR2                0    4    0    1  :1166
   -      6     -    A    16        OR2                0    4    1    0  :1199
   -      1     -    A    16        OR2                0    4    1    0  :1250
   -      8     -    A    16        OR2                0    4    1    0  :1301
   -      3     -    A    16        OR2                0    4    1    0  :1352


Code:

s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register


Device-Specific Information:                           e:\s6\display_8_led.rpt
display_8_led

** FASTTRACK INTERCONNECT UTILIZATION **

Row FastTrack Interconnect:

          Global         Left Half-      Right Half-
         FastTrack       FastTrack       FastTrack 
Row     Interconnect    Interconnect    Interconnect    Input Pins     Output Pins     Bidir Pins
A:       5/ 96(  5%)     0/ 48(  0%)     6/ 48( 12%)    0/16(  0%)      6/16( 37%)     0/16(  0%)
B:       0/ 96(  0%)     0/ 48(  0%)     0/ 48(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
C:      25/ 96( 26%)    14/ 48( 29%)     7/ 48( 14%)    9/16( 56%)      0/16(  0%)     0/16(  0%)


Column FastTrack Interconnect:

         FastTrack                                 
Column  Interconnect    Input Pins     Output Pins     Bidir Pins
01:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
02:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
03:      2/24(  8%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
04:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
05:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
06:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
07:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
08:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
09:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
10:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
11:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
12:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
13:      2/24(  8%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
14:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
15:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
16:      2/24(  8%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
17:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
18:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
19:      2/24(  8%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
20:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
21:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
22:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
23:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
24:      2/24(  8%)     2/4( 50%)      0/4(  0%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:                           e:\s6\display_8_led.rpt
display_8_led

** CLOCK SIGNALS **

Type     Fan-out       Name
INPUT       13         clk


Device-Specific Information:                           e:\s6\display_8_led.rpt
display_8_led

** EQUATIONS **

clk      : INPUT;
d00      : INPUT;
d01      : INPUT;
d02      : INPUT;
d03      : INPUT;
d10      : INPUT;
d11      : INPUT;
d12      : INPUT;
d13      : INPUT;
d20      : INPUT;
d21      : INPUT;
d22      : INPUT;
d23      : INPUT;
d30      : INPUT;
d31      : INPUT;
d32      : INPUT;
d33      : INPUT;
d40      : INPUT;
d41      : INPUT;
d42      : INPUT;
d43      : INPUT;
d50      : INPUT;
d51      : INPUT;
d52      : INPUT;
d53      : INPUT;
d60      : INPUT;
d61      : INPUT;
d62      : INPUT;
d63      : INPUT;
d70      : INPUT;
d71      : INPUT;
d72      : INPUT;
d73      : INPUT;

-- Node name is 'led0' 
-- Equation name is 'led0', type is output 
led0     =  _LC3_A16;

-- Node name is 'led1' 
-- Equation name is 'led1', type is output 
led1     =  _LC8_A16;

-- Node name is 'led2' 
-- Equation name is 'led2', type is output 
led2     =  _LC1_A16;

-- Node name is 'led3' 
-- Equation name is 'led3', type is output 
led3     =  _LC6_A16;

-- Node name is 'led4' 
-- Equation name is 'led4', type is output 
led4     =  _LC8_A14;

-- Node name is 'led5' 
-- Equation name is 'led5', type is output 
led5     =  _LC7_A16;

-- Node name is 'led6' 
-- Equation name is 'led6', type is output 
led6     =  _LC4_A16;

-- Node name is ':59' = 'num0' 
-- Equation name is 'num0', location is LC1_C19, type is buried.
num0     = DFFE( _EQ001, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ001 = !_LC7_C11 &  _LC8_C19
         #  d00 &  _LC7_C11;

-- Node name is ':58' = 'num1' 
-- Equation name is 'num1', location is LC1_C16, type is buried.
num1     = DFFE( _EQ002, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ002 = !_LC7_C11 &  _LC8_C16
         #  d01 &  _LC7_C11;

-- Node name is ':57' = 'num2' 
-- Equation name is 'num2', location is LC1_C3, type is buried.
num2     = DFFE( _EQ003, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ003 = !_LC7_C11 &  _LC8_C3
         #  d02 &  _LC7_C11;

-- Node name is ':56' = 'num3' 
-- Equation name is 'num3', location is LC1_C13, type is buried.
num3     = DFFE( _EQ004, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ004 = !_LC7_C11 &  _LC8_C13
         #  d03 &  _LC7_C11;

-- Node name is ':52' = 'q0' 
-- Equation name is 'q0', location is LC1_C2, type is buried.
q0       = DFFE(!q0, GLOBAL( clk),  VCC,  VCC,  VCC);

-- Node name is ':51' = 'q1' 
-- Equation name is 'q1', location is LC7_C7, type is buried.
q1       = DFFE( _EQ005, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ005 = !_LC2_C7 &  q0 & !q1
         # !_LC1_C7 &  q0 & !q1
         # !_LC2_C7 & !q0 &  q1
         # !_LC1_C7 & !q0 &  q1;

-- Node name is ':50' = 'q2' 
-- Equation name is 'q2', location is LC6_C7, type is buried.
q2       = DFFE( _EQ006, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ006 = !_LC3_C7 & !q0 &  q2
         # !_LC3_C7 & !q1 &  q2
         # !_LC3_C7 &  q0 &  q1 & !q2;

-- Node name is ':49' = 'q3' 
-- Equation name is 'q3', location is LC5_C7, type is buried.
q3       = DFFE( _EQ007, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ007 = !_LC2_C7 &  q3
         # !_LC1_C7 &  _LC2_C7 & !q3;

-- Node name is ':48' = 'q4' 
-- Equation name is 'q4', location is LC4_C7, type is buried.
q4       = DFFE( _EQ008, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ008 = !_LC2_C7 &  q4
         # !_LC1_C7 & !q3 &  q4
         # !_LC1_C7 &  _LC2_C7 &  q3 & !q4;

-- Node name is ':47' = 'q5' 
-- Equation name is 'q5', location is LC8_C7, type is buried.
q5       = DFFE( _EQ009, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ009 = !q3 &  q5
         # !_LC2_C7 &  q5
         # !q4 &  q5
         #  _LC2_C7 &  q3 &  q4 & !q5;

-- Node name is 'sel0' 
-- Equation name is 'sel0', type is output 
sel0     =  _LC1_C10;

-- Node name is 'sel1' 
-- Equation name is 'sel1', type is output 
sel1     =  _LC1_C8;

-- Node name is 'sel2' 
-- Equation name is 'sel2', type is output 
sel2     =  _LC3_C11;

-- Node name is '|LPM_ADD_SUB:122|addcore:adder|:67' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_C7', type is buried 
!_LC2_C7 = _LC2_C7~NOT;
_LC2_C7~NOT = LCELL( _EQ010);
  _EQ010 = !q2
         # !q0
         # !q1;

-- Node name is ':41' 
-- Equation name is '_LC3_C11', type is buried 
_LC3_C11 = DFFE( q5, GLOBAL( clk),  VCC,  VCC,  VCC);

-- Node name is ':43' 
-- Equation name is '_LC1_C8', type is buried 
_LC1_C8  = DFFE( q4, GLOBAL( clk),  VCC,  VCC,  VCC);

-- Node name is ':45' 
-- Equation name is '_LC1_C10', type is buried 
_LC1_C10 = DFFE( q3, GLOBAL( clk),  VCC,  VCC,  VCC);

-- Node name is ':85' 
-- Equation name is '_LC3_C7', type is buried 
!_LC3_C7 = _LC3_C7~NOT;
_LC3_C7~NOT = LCELL( _EQ011);
  _EQ011 = !_LC2_C7
         # !_LC1_C7;

-- Node name is ':328' 
-- Equation name is '_LC7_C11', type is buried 
_LC7_C11 = LCELL( _EQ012);
  _EQ012 = !q3 & !q4 & !q5;

-- Node name is ':335' 
-- Equation name is '_LC5_C11', type is buried 
_LC5_C11 = LCELL( _EQ013);
  _EQ013 =  q3 & !q4 & !q5;

-- Node name is ':342' 
-- Equation name is '_LC2_C11', type is buried 
_LC2_C11 = LCELL( _EQ014);
  _EQ014 = !q3 &  q4 & !q5;

-- Node name is ':349' 
-- Equation name is '_LC6_C11', type is buried 
_LC6_C11 = LCELL( _EQ015);
  _EQ015 =  q3 &  q4 & !q5;

-- Node name is ':356' 
-- Equation name is '_LC1_C11', type is buried 
_LC1_C11 = LCELL( _EQ016);
  _EQ016 = !q3 & !q4 &  q5;

-- Node name is ':363' 
-- Equation name is '_LC8_C11', type is buried 
_LC8_C11 = LCELL( _EQ017);
  _EQ017 =  q3 & !q4 &  q5;

-- Node name is ':370' 
-- Equation name is '_LC4_C11', type is buried 
_LC4_C11 = LCELL( _EQ018);
  _EQ018 = !q3 &  q4 &  q5;

-- Node name is ':377' 
-- Equation name is '_LC1_C7', type is buried 
!_LC1_C7 = _LC1_C7~NOT;
_LC1_C7~NOT = LCELL( _EQ019);
  _EQ019 = !q5
         # !q4
         # !q3;

-- Node name is ':566' 
-- Equation name is '_LC2_C13', type is buried 
_LC2_C13 = LCELL( _EQ020);
  _EQ020 =  d73 &  _LC1_C7
         # !_LC1_C7 &  num3;

-- Node name is ':572' 
-- Equation name is '_LC3_C13', type is buried 
_LC3_C13 = LCELL( _EQ021);
  _EQ021 =  _LC2_C13 & !_LC4_C11
         #  d63 &  _LC4_C11;

-- Node name is ':578' 
-- Equation name is '_LC4_C13', type is buried 
_LC4_C13 = LCELL( _EQ022);
  _EQ022 =  _LC3_C13 & !_LC8_C11
         #  d53 &  _LC8_C11;

-- Node name is ':584' 
-- Equation name is '_LC5_C13', type is buried 
_LC5_C13 = LCELL( _EQ023);
  _EQ023 = !_LC1_C11 &  _LC4_C13
         #  d43 &  _LC1_C11;

-- Node name is ':590' 
-- Equation name is '_LC6_C13', type is buried 
_LC6_C13 = LCELL( _EQ024);
  _EQ024 =  _LC5_C13 & !_LC6_C11
         #  d33 &  _LC6_C11;

-- Node name is ':596' 
-- Equation name is '_LC7_C13', type is buried 
_LC7_C13 = LCELL( _EQ025);
  _EQ025 = !_LC2_C11 &  _LC6_C13
         #  d23 &  _LC2_C11;

-- Node name is ':602' 
-- Equation name is '_LC8_C13', type is buried 
_LC8_C13 = LCELL( _EQ026);
  _EQ026 = !_LC5_C11 &  _LC7_C13
         #  d13 &  _LC5_C11;

-- Node name is ':614' 
-- Equation name is '_LC2_C3', type is buried 
_LC2_C3  = LCELL( _EQ027);
  _EQ027 =  d72 &  _LC1_C7
         # !_LC1_C7 &  num2;

-- Node name is ':617' 
-- Equation name is '_LC3_C3', type is buried 
_LC3_C3  = LCELL( _EQ028);
  _EQ028 =  _LC2_C3 & !_LC4_C11
         #  d62 &  _LC4_C11;

-- Node name is ':620' 
-- Equation name is '_LC4_C3', type is buried 
_LC4_C3  = LCELL( _EQ029);
  _EQ029 =  _LC3_C3 & !_LC8_C11
         #  d52 &  _LC8_C11;

-- Node name is ':623' 
-- Equation name is '_LC5_C3', type is buried 
_LC5_C3  = LCELL( _EQ030);
  _EQ030 = !_LC1_C11 &  _LC4_C3
         #  d42 &  _LC1_C11;

-- Node name is ':626' 
-- Equation name is '_LC6_C3', type is buried 
_LC6_C3  = LCELL( _EQ031);
  _EQ031 =  _LC5_C3 & !_LC6_C11
         #  d32 &  _LC6_C11;

-- Node name is ':629' 
-- Equation name is '_LC7_C3', type is buried 
_LC7_C3  = LCELL( _EQ032);
  _EQ032 = !_LC2_C11 &  _LC6_C3

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