v_fpga.sim.rpt

自己写的iic配置芯片的源程序

; |v_fpga|sim_i2c:inst3|state.wr11_b                                                     ; |v_fpga|sim_i2c:inst3|state.wr11_b                                                ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr11_c                                                     ; |v_fpga|sim_i2c:inst3|state.wr11_c                                                ; regout           ;
; |v_fpga|sim_i2c:inst3|Selector161~834                                                  ; |v_fpga|sim_i2c:inst3|Selector161~834                                             ; combout          ;
; |v_fpga|sim_i2c:inst3|state.wr13_b                                                     ; |v_fpga|sim_i2c:inst3|state.wr13_b                                                ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr13_c                                                     ; |v_fpga|sim_i2c:inst3|state.wr13_c                                                ; regout           ;
; |v_fpga|sim_i2c:inst3|Selector161~835                                                  ; |v_fpga|sim_i2c:inst3|Selector161~835                                             ; combout          ;
; |v_fpga|sim_i2c:inst3|Selector161~836                                                  ; |v_fpga|sim_i2c:inst3|Selector161~836                                             ; combout          ;
; |v_fpga|sim_i2c:inst3|Selector161~837                                                  ; |v_fpga|sim_i2c:inst3|Selector161~837                                             ; combout          ;
; |v_fpga|sim_i2c:inst3|Selector161~838                                                  ; |v_fpga|sim_i2c:inst3|Selector161~838                                             ; combout          ;
; |v_fpga|sim_i2c:inst3|state.wr22_b                                                     ; |v_fpga|sim_i2c:inst3|state.wr22_b                                                ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr22_c                                                     ; |v_fpga|sim_i2c:inst3|state.wr22_c                                                ; regout           ;
; |v_fpga|sim_i2c:inst3|Selector161~839                                                  ; |v_fpga|sim_i2c:inst3|Selector161~839                                             ; combout          ;
; |v_fpga|sim_i2c:inst3|Selector161~840                                                  ; |v_fpga|sim_i2c:inst3|Selector161~840                                             ; combout          ;
; |v_fpga|sim_i2c:inst3|state.start_b                                                    ; |v_fpga|sim_i2c:inst3|state.start_b                                               ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr3_b                                                      ; |v_fpga|sim_i2c:inst3|state.wr3_b                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr3_c                                                      ; |v_fpga|sim_i2c:inst3|state.wr3_c                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr2_b                                                      ; |v_fpga|sim_i2c:inst3|state.wr2_b                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr2_c                                                      ; |v_fpga|sim_i2c:inst3|state.wr2_c                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|Selector161~841                                                  ; |v_fpga|sim_i2c:inst3|Selector161~841                                             ; combout          ;
; |v_fpga|sim_i2c:inst3|Selector161~842                                                  ; |v_fpga|sim_i2c:inst3|Selector161~842                                             ; combout          ;
; |v_fpga|sim_i2c:inst3|state.ack3_b                                                     ; |v_fpga|sim_i2c:inst3|state.ack3_b                                                ; regout           ;
; |v_fpga|sim_i2c:inst3|state.ack1_b                                                     ; |v_fpga|sim_i2c:inst3|state.ack1_b                                                ; regout           ;
; |v_fpga|sim_i2c:inst3|WideOr167~42                                                     ; |v_fpga|sim_i2c:inst3|WideOr167~42                                                ; combout          ;
; |v_fpga|sim_i2c:inst3|state.ack1_c                                                     ; |v_fpga|sim_i2c:inst3|state.ack1_c                                                ; regout           ;
; |v_fpga|sim_i2c:inst3|state.ack2_b                                                     ; |v_fpga|sim_i2c:inst3|state.ack2_b                                                ; regout           ;
; |v_fpga|sim_i2c:inst3|state.ack2_c                                                     ; |v_fpga|sim_i2c:inst3|state.ack2_c                                                ; regout           ;
; |v_fpga|sim_i2c:inst3|WideOr167~43                                                     ; |v_fpga|sim_i2c:inst3|WideOr167~43                                                ; combout          ;
; |v_fpga|sim_i2c:inst3|WideOr167~44                                                     ; |v_fpga|sim_i2c:inst3|WideOr167~44                                                ; combout          ;
; |v_fpga|sim_i2c:inst3|Selector151~53                                                   ; |v_fpga|sim_i2c:inst3|Selector151~53                                              ; combout          ;
; |v_fpga|sim_i2c:inst3|Add0~222                                                         ; |v_fpga|sim_i2c:inst3|Add0~222                                                    ; combout          ;
; |v_fpga|sim_i2c:inst3|Add0~222                                                         ; |v_fpga|sim_i2c:inst3|Add0~223                                                    ; cout0            ;
; |v_fpga|sim_i2c:inst3|Add0~222                                                         ; |v_fpga|sim_i2c:inst3|Add0~223COUT1                                               ; cout1            ;
; |v_fpga|sim_i2c:inst3|cycle[2]                                                         ; |v_fpga|sim_i2c:inst3|Equal1~137                                                  ; combout          ;
; |v_fpga|sim_i2c:inst3|cycle[2]                                                         ; |v_fpga|sim_i2c:inst3|cycle[2]                                                    ; regout           ;
; |v_fpga|sim_i2c:inst3|Add0~224                                                         ; |v_fpga|sim_i2c:inst3|Add0~224                                                    ; combout          ;
; |v_fpga|sim_i2c:inst3|Add0~224                                                         ; |v_fpga|sim_i2c:inst3|Add0~225                                                    ; cout0            ;
; |v_fpga|sim_i2c:inst3|Add0~226                                                         ; |v_fpga|sim_i2c:inst3|Add0~226                                                    ; combout          ;
; |v_fpga|sim_i2c:inst3|Add0~226                                                         ; |v_fpga|sim_i2c:inst3|Add0~227                                                    ; cout             ;
; |v_fpga|sim_i2c:inst3|Add0~228                                                         ; |v_fpga|sim_i2c:inst3|Add0~228                                                    ; combout          ;
; |v_fpga|sim_i2c:inst3|state.start_c                                                    ; |v_fpga|sim_i2c:inst3|state.start_c                                               ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr1_c                                                      ; |v_fpga|sim_i2c:inst3|state.wr1_c                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr4_c                                                      ; |v_fpga|sim_i2c:inst3|state.wr4_c                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr6_c                                                      ; |v_fpga|sim_i2c:inst3|state.wr6_c                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr7_c                                                      ; |v_fpga|sim_i2c:inst3|state.wr7_c                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr8_c                                                      ; |v_fpga|sim_i2c:inst3|state.wr8_c                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr1_b                                                      ; |v_fpga|sim_i2c:inst3|state.wr1_b                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr4_b                                                      ; |v_fpga|sim_i2c:inst3|state.wr4_b                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr6_b                                                      ; |v_fpga|sim_i2c:inst3|state.wr6_b                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr7_b                                                      ; |v_fpga|sim_i2c:inst3|state.wr7_b                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|state.wr8_b                                                      ; |v_fpga|sim_i2c:inst3|state.wr8_b                                                 ; regout           ;
; |v_fpga|sim_i2c:inst3|\nxt_state_decoder:done                                          ; |v_fpga|sim_i2c:inst3|\nxt_state_decoder:done                                     ; combout          ;
; |v_fpga|sim_i2c:inst3|data[7]                                                          ; |v_fpga|sim_i2c:inst3|data[7]                                                     ; combout          ;
; |v_fpga|sim_i2c:inst3|data[6]                                                          ; |v_fpga|sim_i2c:inst3|data[6]                                                     ; combout          ;
; |v_fpga|sim_i2c:inst3|data[5]                                                          ; |v_fpga|sim_i2c:inst3|data[5]                                                     ; combout          ;
; |v_fpga|sim_i2c:inst3|data[4]                                                          ; |v_fpga|sim_i2c:inst3|data[4]                                                     ; combout          ;
; |v_fpga|sim_i2c:inst3|data[3]                                                          ; |v_fpga|sim_i2c:inst3|data[3]                                                     ; combout          ;
; |v_fpga|sim_i2c:inst3|data[2]                                                          ; |v_fpga|sim_i2c:inst3|data[2]                                                     ; combout          ;
; |v_fpga|sim_i2c:inst3|data[1]                                                          ; |v_fpga|sim_i2c:inst3|data[1]                                                     ; combout          ;
; |v_fpga|sim_i2c:inst3|data[0]                                                          ; |v_fpga|sim_i2c:inst3|data[0]                                                     ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_4927                                                        ; |v_fpga|sim_i2c:inst3|comb_4927                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_4919                                                        ; |v_fpga|sim_i2c:inst3|comb_4919                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_4967                                                        ; |v_fpga|sim_i2c:inst3|comb_4967                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_4911                                                        ; |v_fpga|sim_i2c:inst3|comb_4911                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_4815                                                        ; |v_fpga|sim_i2c:inst3|comb_4815                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_3528                                                        ; |v_fpga|sim_i2c:inst3|comb_3528                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|subadd[6]                                                        ; |v_fpga|sim_i2c:inst3|subadd[6]                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|subadd[4]                                                        ; |v_fpga|sim_i2c:inst3|subadd[4]                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|subadd[1]                                                        ; |v_fpga|sim_i2c:inst3|subadd[1]                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|addwr[3]                                                         ; |v_fpga|sim_i2c:inst3|addwr[3]                                                    ; combout          ;
; |v_fpga|sim_i2c:inst3|subadd[7]                                                        ; |v_fpga|sim_i2c:inst3|subadd[7]                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|subadd[0]                                                        ; |v_fpga|sim_i2c:inst3|subadd[0]                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|subadd[2]                                                        ; |v_fpga|sim_i2c:inst3|subadd[2]                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|subadd[3]                                                        ; |v_fpga|sim_i2c:inst3|subadd[3]                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|subadd[5]                                                        ; |v_fpga|sim_i2c:inst3|subadd[5]                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_4823                                                        ; |v_fpga|sim_i2c:inst3|comb_4823                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_3911                                                        ; |v_fpga|sim_i2c:inst3|comb_3911                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_3887                                                        ; |v_fpga|sim_i2c:inst3|comb_3887                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_4519                                                        ; |v_fpga|sim_i2c:inst3|comb_4519                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_4495                                                        ; |v_fpga|sim_i2c:inst3|comb_4495                                                   ; combout          ;
; |v_fpga|sim_i2c:inst3|comb_4487                                                        ; |v_fpga|sim_i2c:inst3|comb_4487                                                   ; combout          ;
; |v_fpga