hwreset9011_9034.vhd

来自「自己写的iic配置芯片的源程序」· VHDL 代码 · 共 53 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity HWReset9011_9034 is
port(  
      CLKIN:in std_logic;
      FAHSYNC,FAVSYNC,
      CLKOUT    :out std_logic;
      HRXRST   : OUT STD_LOGIC;
      HTXRST   : OUT STD_LOGIC
    );
end;

architecture count of HWReset9011_9034 is
signal  en :std_logic;
--signal  ent :std_logic;
signal a:std_logic_vector(5 downto 0); 
signal b:integer range 0 to 99999999;
begin
   process(CLKIN)
    begin
        if(CLKIN'event and CLKIN='1')then
           if(a="100010")then
              a<="000000";
              en<= not en;
           else
              a<=a+1;
           end if;
        end if;
        CLKOUT<=en;
   end process;

   process(CLKIN)
        variable b : integer range 0 to 99999999;
    begin
         if(CLKIN'event and CLKIN='1')then
             if(b = 99)then--99999999
                b := 99;--99999999;
                HRXRST <= '1';
                HTXRST <= '1';
             else
                HRXRST <= '0';
                HTXRST <= '0';
                b:=b+1;
             end if;
         end if;

   end process;
end architecture;