v_fpga.tan.qmsg

自己写的iic配置芯片的源程序

{ "Warning" "WTDB_ANALYZE_COMB_LATCHES" "" "Warning: Timing Analysis is analyzing one or more combinational loops as latches" { { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|\\nxt_state_decoder:done " "Warning: Node \"Init9011:inst1\|\\nxt_state_decoder:done\" is a latch" {  } {  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|data\[6\] " "Warning: Node \"Init9011:inst1\|data\[6\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|addwr\[3\] " "Warning: Node \"Init9011:inst1\|addwr\[3\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|addwr\[1\] " "Warning: Node \"Init9011:inst1\|addwr\[1\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|subadd\[3\] " "Warning: Node \"Init9011:inst1\|subadd\[3\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|subadd\[5\] " "Warning: Node \"Init9011:inst1\|subadd\[5\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|subadd\[2\] " "Warning: Node \"Init9011:inst1\|subadd\[2\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|data\[3\] " "Warning: Node \"Init9011:inst1\|data\[3\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|subadd\[1\] " "Warning: Node \"Init9011:inst1\|subadd\[1\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|data\[7\] " "Warning: Node \"Init9011:inst1\|data\[7\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|data\[1\] " "Warning: Node \"Init9011:inst1\|data\[1\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|subadd\[7\] " "Warning: Node \"Init9011:inst1\|subadd\[7\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|data\[4\] " "Warning: Node \"Init9011:inst1\|data\[4\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|data\[2\] " "Warning: Node \"Init9011:inst1\|data\[2\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|subadd\[0\] " "Warning: Node \"Init9011:inst1\|subadd\[0\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|subadd\[6\] " "Warning: Node \"Init9011:inst1\|subadd\[6\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|subadd\[4\] " "Warning: Node \"Init9011:inst1\|subadd\[4\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|data\[5\] " "Warning: Node \"Init9011:inst1\|data\[5\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|data\[0\] " "Warning: Node \"Init9011:inst1\|data\[0\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 90 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|Dout\[7\] " "Warning: Node \"Init9011:inst1\|Dout\[7\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 828 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|Dout\[6\] " "Warning: Node \"Init9011:inst1\|Dout\[6\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 828 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|Dout\[5\] " "Warning: Node \"Init9011:inst1\|Dout\[5\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 828 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|Dout\[4\] " "Warning: Node \"Init9011:inst1\|Dout\[4\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 828 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|Dout\[3\] " "Warning: Node \"Init9011:inst1\|Dout\[3\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 828 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|Dout\[2\] " "Warning: Node \"Init9011:inst1\|Dout\[2\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 828 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|Dout\[1\] " "Warning: Node \"Init9011:inst1\|Dout\[1\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 828 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "Init9011:inst1\|Dout\[0\] " "Warning: Node \"Init9011:inst1\|Dout\[0\]\" is a latch" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 828 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0}  } {  } 0 0 "Timing Analysis is analyzing one or more combinational loops as latches" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLK27 " "Info: Assuming node \"CLK27\" is an undefined clock" {  } { { "v_fpga.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/v_fpga.bdf" { { 360 -48 120 376 "CLK27" "" } } } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "CLK27" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "14 " "Warning: Found 14 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg5 " "Info: Detected ripple clock \"Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg5\" as buffer" {  } { { "db/altsyncram_ibu.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/db/altsyncram_ibu.tdf" 187 2 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg5" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg4 " "Info: Detected ripple clock \"Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg4\" as buffer" {  } { { "db/altsyncram_ibu.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/db/altsyncram_ibu.tdf" 187 2 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg4" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg3 " "Info: Detected ripple clock \"Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg3\" as buffer" {  } { { "db/altsyncram_ibu.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/db/altsyncram_ibu.tdf" 187 2 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg3" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg2 " "Info: Detected ripple clock \"Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg2\" as buffer" {  } { { "db/altsyncram_ibu.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/db/altsyncram_ibu.tdf" 187 2 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg2" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg1 " "Info: Detected ripple clock \"Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg1\" as buffer" {  } { { "db/altsyncram_ibu.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/db/altsyncram_ibu.tdf" 187 2 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg1" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg0 " "Info: Detected ripple clock \"Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg0\" as buffer" {  } { { "db/altsyncram_ibu.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/db/altsyncram_ibu.tdf" 187 2 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|ram_block1a8~porta_address_reg0" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|q_a\[1\] " "Info: Detected gated clock \"Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|q_a\[1\]\" as buffer" {  } { { "db/altsyncram_ibu.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/db/altsyncram_ibu.tdf" 40 2 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|altsyncram:Mux0_rtl_0\|altsyncram_ibu:auto_generated\|q_a\[1\]" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "Init9011:inst1\|WideOr152~1 " "Info: Detected gated clock \"Init9011:inst1\|WideOr152~1\" as buffer" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 307 -1 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|WideOr152~1" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "Init9011:inst1\|state.stop_c " "Info: Detected ripple clock \"Init9011:inst1\|state.stop_c\" as buffer" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 54 -1 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|state.stop_c" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "HWReset9011_9034:inst4\|en " "Info: Detected ripple clock \"HWReset9011_9034:inst4\|en\" as buffer" {  } { { "HWReset9011_9034.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/HWReset9011_9034.vhd" 22 -1 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "HWReset9011_9034:inst4\|en" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "Init9011:inst1\|state.stop_b " "Info: Detected ripple clock \"Init9011:inst1\|state.stop_b\" as buffer" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 54 -1 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|state.stop_b" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "Init9011:inst1\|state.idle " "Info: Detected ripple clock \"Init9011:inst1\|state.idle\" as buffer" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 54 -1 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|state.idle" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "Init9011:inst1\|state.stop_a " "Info: Detected ripple clock \"Init9011:inst1\|state.stop_a\" as buffer" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 54 -1 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|state.stop_a" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "Init9011:inst1\|WrDone " "Info: Detected ripple clock \"Init9011:inst1\|WrDone\" as buffer" {  } { { "Init9011.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/i2c备份/writeI2C_seq_suc5.9/Init9011.vhd" 792 -1 0 } } { "e:/altera/70/quartus/bin/Assignment Editor.qase" "" { Assignment "e:/altera/70/quartus/bin/Assignment Editor.qase" 1 { { 0 "Init9011:inst1\|WrDone" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0}