📄 mux91.vhd
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LIBRARY ieee;
USE ieee.std_logic_1164.all;
ENTITY MUX91 IS
PORT
(
A : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
B : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
SEL : IN STD_LOGIC;--300kH
RESULT : OUT STD_LOGIC_VECTOR(8 DOWNTO 0)
);
END MUX91;
architecture art of MUX91 is
BEGIN
PROCESS(SEL,A,B)
BEGIN
IF(SEL='1')THEN
RESULT(8 DOWNTO 0)<=B(8 DOWNTO 0);
ELSE
RESULT(8 DOWNTO 0)<=A(8 DOWNTO 0);
END IF;
END PROCESS;
END;
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