v_fpga.map.eqn

自己写的iic配置芯片的源程序

--K1_word_counter[0] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[0]
--operation mode is normal

K1_word_counter[0] = AMPP_FUNCTION(!A1L7, K1_word_counter[0], K1L7, VCC, K1L8);


--K1_word_counter[1] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[1]
--operation mode is normal

K1_word_counter[1] = AMPP_FUNCTION(!A1L7, K1L7, K1_word_counter[0], K1_word_counter[1], VCC, K1L8);


--K1_word_counter[2] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[2]
--operation mode is normal

K1_word_counter[2] = AMPP_FUNCTION(!A1L7, K1_word_counter[0], K1_word_counter[1], K1L7, K1_word_counter[2], VCC, K1L8);


--K1_word_counter[3] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[3]
--operation mode is normal

K1_word_counter[3] = AMPP_FUNCTION(!A1L7, K1L7, K1_word_counter[3], K1_word_counter[2], K1L1, VCC, K1L8);


--K1L15 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~732
--operation mode is normal

K1L15 = AMPP_FUNCTION(K1_word_counter[0], K1_word_counter[1], K1_word_counter[2], K1_word_counter[3]);


--K2_clear_signal is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|clear_signal
--operation mode is normal

K2_clear_signal = AMPP_FUNCTION(LB1_state[8], G1_jtag_debug_mode_usr1);


--K1L13 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[2]~734
--operation mode is normal

K1L13 = AMPP_FUNCTION(LB1_state[8], LB1L18, G1L27, G1_jtag_debug_mode_usr1);


--P4_dffs[1] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[1]
--operation mode is normal

P4_dffs[1] = AMPP_FUNCTION(!A1L7, P4_dffs[2], GB1_safe_q[0], B1L28, !B1_reset_all);


--M1_is_max_write_address_ff is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff
--operation mode is normal

M1_is_max_write_address_ff = AMPP_FUNCTION(F1_en, GB1_cout, M1_is_max_write_address_ff, !B1_reset_all);


--B1L28 is sld_signaltap:auto_signaltap_0|sdr~23
--operation mode is normal

B1L28 = AMPP_FUNCTION(LB1_state[4], G1L27, G1_jtag_debug_mode_usr1);


--G1_jtag_debug_mode_usr0 is sld_hub:sld_hub_inst|jtag_debug_mode_usr0
--operation mode is normal

G1_jtag_debug_mode_usr0 = AMPP_FUNCTION(!A1L7, A1L108, A1L109, P5_dffs[1], P5_dffs[0], LB1_state[0], LB1_state[12]);


--G1L25 is sld_hub:sld_hub_inst|jtag_debug_mode~2
--operation mode is normal

G1L25 = AMPP_FUNCTION(G1_jtag_debug_mode_usr1, G1_jtag_debug_mode_usr0);


--JB3_Q[2] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[2]
--operation mode is normal

JB3_Q[2] = AMPP_FUNCTION(!A1L7, JB3_Q[3], G1L21, LB1_state[4], G1_CLRN_SIGNAL, JB3L4);


--JB3_Q[1] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[1]
--operation mode is normal

JB3_Q[1] = AMPP_FUNCTION(!A1L7, JB3_Q[2], M1L3, LB1_state[4], G1_CLRN_SIGNAL, JB3L4);


--G1L17 is sld_hub:sld_hub_inst|IRF_ENA_ENABLE~30
--operation mode is normal

G1L17 = AMPP_FUNCTION(LB1_state[4], G1_jtag_debug_mode_usr1);


--G1L2 is sld_hub:sld_hub_inst|comb~53
--operation mode is normal

G1L2 = AMPP_FUNCTION(LB1_state[3], G1_jtag_debug_mode_usr0);


--G1L3 is sld_hub:sld_hub_inst|comb~54
--operation mode is normal

G1L3 = AMPP_FUNCTION(altera_internal_jtag, G1L17, G1L2, A1L9);


--K2L17Q is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[1]~750
--operation mode is normal

K2L17Q = AMPP_FUNCTION(!A1L7, LB1_state[4], K2L19Q, K2L20Q, K2_clear_signal, VCC, K2L18);


--K2L19Q is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[2]~751
--operation mode is normal

K2L19Q = AMPP_FUNCTION(!A1L7, K1L16, K2_word_counter[1], K2L24, K2_word_counter[2], VCC, K2L18);


--K1L16 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~735
--operation mode is normal

K1L16 = AMPP_FUNCTION(LB1_state[8], G1_jtag_debug_mode_usr1, LB1_state[4]);


--K2_word_counter[3] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[3]
--operation mode is arithmetic

K2_word_counter[3] = AMPP_FUNCTION(!A1L7, K2_word_counter[3], VCC, K2L13, K2L12, K2L8);

--K2L10 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[3]~237
--operation mode is arithmetic

K2L10 = AMPP_FUNCTION(K2_word_counter[3], K2L8);


--K2_word_counter[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[0]
--operation mode is arithmetic

K2_word_counter[0] = AMPP_FUNCTION(!A1L7, K2_word_counter[0], VCC, K2L13, K2L12);

--K2L4 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[0]~241
--operation mode is arithmetic

K2L4 = AMPP_FUNCTION(K2_word_counter[0]);


--K2_word_counter[1] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[1]
--operation mode is arithmetic

K2_word_counter[1] = AMPP_FUNCTION(!A1L7, K2_word_counter[1], VCC, K2L13, K2L12, K2L4);

--K2L6 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[1]~245
--operation mode is arithmetic

K2L6 = AMPP_FUNCTION(K2_word_counter[1], K2L4);


--K2_word_counter[2] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[2]
--operation mode is arithmetic

K2_word_counter[2] = AMPP_FUNCTION(!A1L7, K2_word_counter[2], VCC, K2L13, K2L12, K2L6);

--K2L8 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[2]~249
--operation mode is arithmetic

K2L8 = AMPP_FUNCTION(K2_word_counter[2], K2L6);


--K2L22 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~840
--operation mode is normal

K2L22 = AMPP_FUNCTION(K2_word_counter[3], K2_word_counter[0], K2_word_counter[1], K2_word_counter[2]);


--K2L23 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~841
--operation mode is normal

K2L23 = AMPP_FUNCTION(K2_word_counter[3], K2_word_counter[0], K2_word_counter[1], K2_word_counter[2]);


--K2_word_counter[4] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[4]
--operation mode is normal

K2_word_counter[4] = AMPP_FUNCTION(!A1L7, K2_word_counter[4], VCC, K2L13, K2L12, K2L10);


--Y1_status_out[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[0]
--operation mode is normal

Y1_status_out[0] = AMPP_FUNCTION(F1_en, Y1L5, Y1_status_out[0], W1L8, !B1_reset_all);


--X1_post_trigger_count_enable is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable
--operation mode is normal

X1_post_trigger_count_enable = AMPP_FUNCTION(F1_en, M1_is_max_write_address_ff, W1L8, X1L5, !B1_reset_all);


--P1_dffs[5] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[5]
--operation mode is normal

P1_dffs[5] = AMPP_FUNCTION(!A1L7, P1_dffs[6], !B1_reset_all, L1_trigger_setup_ena);


--L1L3 is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|ela_status~88
--operation mode is normal

L1L3 = AMPP_FUNCTION(Y1_status_out[0], X1_post_trigger_count_enable, P1_dffs[5]);


--G1L15 is sld_hub:sld_hub_inst|hub_tdo~463
--operation mode is normal

G1L15 = AMPP_FUNCTION(G1_jtag_debug_mode_usr1, LB1_state[4], LB1_state[3]);


--JB3_Q[7] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[7]
--operation mode is normal

JB3_Q[7] = AMPP_FUNCTION(!A1L7, G1L17, JB3_Q[7], altera_internal_jtag, G1L15, G1_CLRN_SIGNAL);


--MB1_dffe1a[3] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_bje:auto_generated|dffe1a[3]
--operation mode is normal

MB1_dffe1a[3] = AMPP_FUNCTION(!A1L7, JB3_Q[2], JB3_Q[1], G1L25, JB3_Q[3], G1_CLRN_SIGNAL, G1L3);


--JB3L3 is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]~209
--operation mode is normal

JB3L3 = AMPP_FUNCTION(LB1_state[4], JB3_Q[3], JB3_Q[7], MB1_dffe1a[3]);


--E1_state.ack1_b is sim_i2c:inst3|state.ack1_b
--operation mode is normal

E1_state.ack1_b_lut_out = E1_state.ack1_a;
E1_state.ack1_b = DFFEAS(E1_state.ack1_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.ack1_c is sim_i2c:inst3|state.ack1_c
--operation mode is normal

E1_state.ack1_c_lut_out = E1_state.ack1_b;
E1_state.ack1_c = DFFEAS(E1_state.ack1_c_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.ack2_b is sim_i2c:inst3|state.ack2_b
--operation mode is normal

E1_state.ack2_b_lut_out = E1_state.ack2_a;
E1_state.ack2_b = DFFEAS(E1_state.ack2_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1L110 is sim_i2c:inst3|reduce_or~451
--operation mode is normal

E1L110 = !E1_state.ack3_c & !E1_state.ack1_b & !E1_state.ack1_c & !E1_state.ack2_b;


--E1_state.ack2_c is sim_i2c:inst3|state.ack2_c
--operation mode is normal

E1_state.ack2_c_lut_out = E1_state.ack2_b;
E1_state.ack2_c = DFFEAS(E1_state.ack2_c_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.ack3_b is sim_i2c:inst3|state.ack3_b
--operation mode is normal

E1_state.ack3_b_lut_out = E1_state.ack3_a;
E1_state.ack3_b = DFFEAS(E1_state.ack3_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1L111 is sim_i2c:inst3|reduce_or~452
--operation mode is normal

E1L111 = E1L110 & (!E1_state.ack2_c & !E1_state.ack3_b);


--E1_state.start_b is sim_i2c:inst3|state.start_b
--operation mode is normal

E1_state.start_b_lut_out = E1_state.start_a;
E1_state.start_b = DFFEAS(E1_state.start_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.wr3_b is sim_i2c:inst3|state.wr3_b
--operation mode is normal

E1_state.wr3_b_lut_out = E1_state.wr3_a;
E1_state.wr3_b = DFFEAS(E1_state.wr3_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.wr3_c is sim_i2c:inst3|state.wr3_c
--operation mode is normal

E1_state.wr3_c_lut_out = E1_state.wr3_b;
E1_state.wr3_c = DFFEAS(E1_state.wr3_c_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1L115 is sim_i2c:inst3|Select~2898
--operation mode is normal

E1L115 = !E1_state.stop_c & !E1_state.start_b & !E1_state.wr3_b & !E1_state.wr3_c;


--E1_state.wr20_b is sim_i2c:inst3|state.wr20_b
--operation mode is normal

E1_state.wr20_b_lut_out = E1_state.wr20_a;
E1_state.wr20_b = DFFEAS(E1_state.wr20_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.wr20_c is sim_i2c:inst3|state.wr20_c
--operation mode is normal

E1_state.wr20_c_lut_out = E1_state.wr20_b;
E1_state.wr20_c = DFFEAS(E1_state.wr20_c_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1L116 is sim_i2c:inst3|Select~2899
--operation mode is normal

E1L116 = !E1_state.wr20_b & !E1_state.wr20_c;


--E1_state.wr9_b is sim_i2c:inst3|state.wr9_b
--operation mode is normal

E1_state.wr9_b_lut_out = E1_state.wr9_a;
E1_state.wr9_b = DFFEAS(E1_state.wr9_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.wr9_c is sim_i2c:inst3|state.wr9_c
--operation mode is normal

E1_state.wr9_c_lut_out = E1_state.wr9_b;
E1_state.wr9_c = DFFEAS(E1_state.wr9_c_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1L117 is sim_i2c:inst3|Select~2900
--operation mode is normal

E1L117 = !E1_state.wr9_b & !E1_state.wr9_c;


--E1L118 is sim_i2c:inst3|Select~2901
--operation mode is normal

E1L118 = !E1L117 # !E1L116 # !E1L115 # !E1L111;


--E1_state.wr13_b is sim_i2c:inst3|state.wr13_b
--operation mode is normal

E1_state.wr13_b_lut_out = E1_state.wr13_a;
E1_state.wr13_b = DFFEAS(E1_state.wr13_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.wr13_c is sim_i2c:inst3|state.wr13_c
--operation mode is normal

E1_state.wr13_c_lut_out = E1_state.wr13_b;
E1_state.wr13_c = DFFEAS(E1_state.wr13_c_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1L119 is sim_i2c:inst3|Select~2902
--operation mode is normal

E1L119 = !E1_state.wr13_b & !E1_state.wr13_c;


--E1_state.wr12_b is sim_i2c:inst3|state.wr12_b
--operation mode is normal

E1_state.wr12_b_lut_out = E1_state.wr12_a;
E1_state.wr12_b = DFFEAS(E1_state.wr12_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.wr12_c is sim_i2c:inst3|state.wr12_c
--operation mode is normal

E1_state.wr12_c_lut_out = E1_state.wr12_b;
E1_state.wr12_c = DFFEAS(E1_state.wr12_c_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1L120 is sim_i2c:inst3|Select~2903
--operation mode is normal

E1L120 = !E1_state.wr12_b & !E1_state.wr12_c;


--E1_state.wr2_b is sim_i2c:inst3|state.wr2_b
--operation mode is normal

E1_state.wr2_b_lut_out = E1_state.wr2_a;
E1_state.wr2_b = DFFEAS(E1_state.wr2_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.wr2_c is sim_i2c:inst3|state.wr2_c
--operation mode is normal

E1_state.wr2_c_lut_out = E1_state.wr2_b;
E1_state.wr2_c = DFFEAS(E1_state.wr2_c_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1L121 is sim_i2c:inst3|Select~2904
--operation mode is normal

E1L121 = !E1_state.wr2_b & !E1_state.wr2_c;


--E1_state.wr17_b is sim_i2c:inst3|state.wr17_b
--operation mode is normal

E1_state.wr17_b_lut_out = E1_state.wr17_a;
E1_state.wr17_b = DFFEAS(E1_state.wr17_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.wr17_c is sim_i2c:inst3|state.wr17_c
--operation mode is normal

E1_state.wr17_c_lut_out = E1_state.wr17_b;
E1_state.wr17_c = DFFEAS(E1_state.wr17_c_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1L122 is sim_i2c:inst3|Select~2905
--operation mode is normal

E1L122 = !E1_state.wr17_b & !E1_state.wr17_c;


--E1L123 is sim_i2c:inst3|Select~2906
--operation mode is normal

E1L123 = !E1L122 # !E1L121 # !E1L120 # !E1L119;


--E1_state.wr16_b is sim_i2c:inst3|state.wr16_b
--operation mode is normal

E1_state.wr16_b_lut_out = E1_state.wr16_a;
E1_state.wr16_b = DFFEAS(E1_state.wr16_b_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.wr16_c is sim_i2c:inst3|state.wr16_c
--operation mode is normal

E1_state.wr16_c_lut_out = E1_state.wr16_b;
E1_state.wr16_c = DFFEAS(E1_state.wr16_c_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1L124 is sim_i2c:inst3|Select~2907
--operation mode is normal

E1L124 = !E1_state.wr16_b & !E1_