v_fpga.map.eqn

自己写的iic配置芯片的源程序

--JB4_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[5]
--operation mode is normal

JB4_Q[5] = AMPP_FUNCTION(!A1L7, JB5_Q[5], JB3_Q[5], JB2_Q[0], G1_CLRN_SIGNAL, G1L19);


--JB4_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3]
--operation mode is normal

JB4_Q[3] = AMPP_FUNCTION(!A1L7, JB5_Q[3], JB3_Q[3], JB2_Q[0], G1_CLRN_SIGNAL, G1L19);


--JB4_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[4]
--operation mode is normal

JB4_Q[4] = AMPP_FUNCTION(!A1L7, JB5_Q[4], JB3_Q[4], JB2_Q[0], G1_CLRN_SIGNAL, G1L19);


--G1L12 is sld_hub:sld_hub_inst|hub_tdo~457
--operation mode is normal

G1L12 = AMPP_FUNCTION(B1_bypass_reg_out, JB4_Q[5], JB4_Q[3], JB4_Q[4]);


--P1_dffs[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[0]
--operation mode is normal

P1_dffs[0] = AMPP_FUNCTION(!A1L7, P1_dffs[1], !B1_reset_all, L1_trigger_setup_ena);


--K1_WORD_SR[0] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[0]
--operation mode is normal

K1_WORD_SR[0] = AMPP_FUNCTION(!A1L7, K1_WORD_SR[1], K1L15, LB1_state[4], K2_clear_signal, VCC, K1L13);


--G1L13 is sld_hub:sld_hub_inst|hub_tdo~458
--operation mode is normal

G1L13 = AMPP_FUNCTION(JB4_Q[5], JB4_Q[3], P1_dffs[0], K1_WORD_SR[0]);


--P4_dffs[0] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[0]
--operation mode is normal

P4_dffs[0] = AMPP_FUNCTION(!A1L7, P4_dffs[1], M1_is_max_write_address_ff, B1L28, !B1_reset_all);


--LB1L18 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13
--operation mode is normal

LB1L18 = AMPP_FUNCTION(LB1_state[4], LB1_state[3]);


--G1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG
--operation mode is normal

G1_HUB_BYPASS_REG = AMPP_FUNCTION(!A1L7, altera_internal_jtag, LB1_state[4], VCC);


--MB1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_bje:auto_generated|dffe1a[0]
--operation mode is normal

MB1_dffe1a[0] = AMPP_FUNCTION(!A1L7, G1L25, JB3_Q[3], JB3_Q[2], JB3_Q[1], G1_CLRN_SIGNAL, G1L3);


--K2L15Q is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]~748
--operation mode is normal

K2L15Q = AMPP_FUNCTION(!A1L7, LB1_state[4], K2L17Q, K2L19Q, K2_clear_signal, VCC, K2L18);


--K2L16Q is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]~749
--operation mode is normal

K2L16Q = AMPP_FUNCTION(!A1L7, K1L16, K2L22, K2L23, K2_word_counter[4], VCC, K2L18);


--G1L14 is sld_hub:sld_hub_inst|hub_tdo~460
--operation mode is normal

G1L14 = AMPP_FUNCTION(G1_HUB_BYPASS_REG, MB1_dffe1a[0], K2L15Q, K2L16Q);


--JB7_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]
--operation mode is normal

JB7_Q[0] = AMPP_FUNCTION(!A1L7, altera_internal_jtag, VCC, G1L16);


--JB3_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]
--operation mode is normal

JB3_Q[0] = AMPP_FUNCTION(!A1L7, JB3_Q[1], L1L3, LB1_state[4], G1_CLRN_SIGNAL, JB3L4);


--E1_SCLo is sim_i2c:inst3|SCLo
--operation mode is normal

E1_SCLo_lut_out = !E1L118 & !E1L123 & !E1L128 & !E1L135;
E1_SCLo = DFFEAS(E1_SCLo_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_SDAo is sim_i2c:inst3|SDAo
--operation mode is normal

E1_SDAo_lut_out = !E1L140 & !E1L145 & !E1L152 & !E1L160;
E1_SDAo = DFFEAS(E1_SDAo_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1L108Q is sim_i2c:inst3|output_decoder~1
--operation mode is normal

E1L108Q_lut_out = E1L112 # E1_state.ack1_d # E1_state.ack2_d # !E1L111;
E1L108Q = DFFEAS(E1L108Q_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_state.ack3_c is sim_i2c:inst3|state.ack3_c
--operation mode is normal

E1_state.ack3_c_lut_out = E1_state.ack3_b;
E1_state.ack3_c = DFFEAS(E1_state.ack3_c_lut_out, F1_en, F1_HRRESET, , , , , , );


--E1_cycle[14] is sim_i2c:inst3|cycle[14]
--operation mode is normal

E1_cycle[14]_lut_out = E1L30;
E1_cycle[14] = DFFEAS(E1_cycle[14]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[13] is sim_i2c:inst3|cycle[13]
--operation mode is normal

E1_cycle[13]_lut_out = E1L31;
E1_cycle[13] = DFFEAS(E1_cycle[13]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[12] is sim_i2c:inst3|cycle[12]
--operation mode is normal

E1_cycle[12]_lut_out = E1L33;
E1_cycle[12] = DFFEAS(E1_cycle[12]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[11] is sim_i2c:inst3|cycle[11]
--operation mode is normal

E1_cycle[11]_lut_out = E1L35;
E1_cycle[11] = DFFEAS(E1_cycle[11]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[10] is sim_i2c:inst3|cycle[10]
--operation mode is normal

E1_cycle[10]_lut_out = E1L37;
E1_cycle[10] = DFFEAS(E1_cycle[10]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[9] is sim_i2c:inst3|cycle[9]
--operation mode is normal

E1_cycle[9]_lut_out = E1L39;
E1_cycle[9] = DFFEAS(E1_cycle[9]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[8] is sim_i2c:inst3|cycle[8]
--operation mode is normal

E1_cycle[8]_lut_out = E1L41;
E1_cycle[8] = DFFEAS(E1_cycle[8]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[7] is sim_i2c:inst3|cycle[7]
--operation mode is normal

E1_cycle[7]_lut_out = E1L43;
E1_cycle[7] = DFFEAS(E1_cycle[7]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[6] is sim_i2c:inst3|cycle[6]
--operation mode is normal

E1_cycle[6]_lut_out = E1L45;
E1_cycle[6] = DFFEAS(E1_cycle[6]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[5] is sim_i2c:inst3|cycle[5]
--operation mode is normal

E1_cycle[5]_lut_out = E1L47;
E1_cycle[5] = DFFEAS(E1_cycle[5]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[4] is sim_i2c:inst3|cycle[4]
--operation mode is normal

E1_cycle[4]_lut_out = E1L49;
E1_cycle[4] = DFFEAS(E1_cycle[4]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[3] is sim_i2c:inst3|cycle[3]
--operation mode is normal

E1_cycle[3]_lut_out = E1L51 & (!A1L113 # !A1L111 # !A1L110);
E1_cycle[3] = DFFEAS(E1_cycle[3]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[2] is sim_i2c:inst3|cycle[2]
--operation mode is normal

E1_cycle[2]_lut_out = E1L53;
E1_cycle[2] = DFFEAS(E1_cycle[2]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[0] is sim_i2c:inst3|cycle[0]
--operation mode is normal

E1_cycle[0]_lut_out = E1L55 & (!A1L113 # !A1L111 # !A1L110);
E1_cycle[0] = DFFEAS(E1_cycle[0]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--E1_cycle[1] is sim_i2c:inst3|cycle[1]
--operation mode is normal

E1_cycle[1]_lut_out = E1L57 & (!A1L113 # !A1L111 # !A1L110);
E1_cycle[1] = DFFEAS(E1_cycle[1]_lut_out, F1_en, VCC, , E1_WrDone, , , , );


--G1_CLRN_SIGNAL is sld_hub:sld_hub_inst|CLRN_SIGNAL
--operation mode is normal

G1_CLRN_SIGNAL = AMPP_FUNCTION(!A1L7, LB1_state[1], JB1_Q[0], VCC);


--G1_OK_TO_UPDATE_IR_Q is sld_hub:sld_hub_inst|OK_TO_UPDATE_IR_Q
--operation mode is normal

G1_OK_TO_UPDATE_IR_Q = AMPP_FUNCTION(!A1L7, G1_jtag_debug_mode_usr1, G1_OK_TO_UPDATE_IR_Q, LB1_state[4], LB1_state[8], VCC);


--G1L16 is sld_hub:sld_hub_inst|IRF_ENA_ENABLE~29
--operation mode is normal

G1L16 = AMPP_FUNCTION(LB1_state[4], G1_jtag_debug_mode_usr1, G1_OK_TO_UPDATE_IR_Q, A1L9);


--LB1_state[7] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[7]
--operation mode is normal

LB1_state[7] = AMPP_FUNCTION(!A1L7, LB1_state[6], A1L9, VCC);


--LB1_state[2] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[2]
--operation mode is normal

LB1_state[2] = AMPP_FUNCTION(!A1L7, LB1_state[8], LB1_state[1], LB1_state[15], VCC, A1L9);


--P5_dffs[1] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[1]
--operation mode is normal

P5_dffs[1] = AMPP_FUNCTION(!A1L7, P5_dffs[2], LB1_state[0], LB1_state[11]);


--P5_dffs[9] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[9]
--operation mode is normal

P5_dffs[9] = AMPP_FUNCTION(!A1L7, altera_internal_jtag, LB1_state[0], LB1_state[11]);


--P5_dffs[8] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[8]
--operation mode is normal

P5_dffs[8] = AMPP_FUNCTION(!A1L7, P5_dffs[9], LB1_state[0], LB1_state[11]);


--P5_dffs[7] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[7]
--operation mode is normal

P5_dffs[7] = AMPP_FUNCTION(!A1L7, P5_dffs[8], LB1_state[0], LB1_state[11]);


--P5_dffs[6] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[6]
--operation mode is normal

P5_dffs[6] = AMPP_FUNCTION(!A1L7, P5_dffs[7], LB1_state[0], LB1_state[11]);


--A1L108 is rtl~466
--operation mode is normal

A1L108 = !P5_dffs[9] & !P5_dffs[8] & !P5_dffs[7] & !P5_dffs[6];


--P5_dffs[3] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[3]
--operation mode is normal

P5_dffs[3] = AMPP_FUNCTION(!A1L7, P5_dffs[4], LB1_state[0], LB1_state[11]);


--P5_dffs[2] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[2]
--operation mode is normal

P5_dffs[2] = AMPP_FUNCTION(!A1L7, P5_dffs[3], LB1_state[0], LB1_state[11]);


--P5_dffs[5] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[5]
--operation mode is normal

P5_dffs[5] = AMPP_FUNCTION(!A1L7, P5_dffs[6], LB1_state[0], LB1_state[11]);


--P5_dffs[4] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[4]
--operation mode is normal

P5_dffs[4] = AMPP_FUNCTION(!A1L7, P5_dffs[5], LB1_state[0], LB1_state[11]);


--A1L109 is rtl~467
--operation mode is normal

A1L109 = P5_dffs[3] & P5_dffs[2] & !P5_dffs[5] & !P5_dffs[4];


--P5_dffs[0] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[0]
--operation mode is normal

P5_dffs[0] = AMPP_FUNCTION(!A1L7, P5_dffs[1], LB1_state[0], LB1_state[11]);


--LB1_state[0] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0]
--operation mode is normal

LB1_state[0] = AMPP_FUNCTION(!A1L7, LB1_state[9], LB1L19, LB1_state[0], A1L9, VCC);


--LB1_state[12] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[12]
--operation mode is normal

LB1_state[12] = AMPP_FUNCTION(!A1L7, LB1_state[11], LB1_state[10], VCC, A1L9);


--LB1_state[5] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[5]
--operation mode is normal

LB1_state[5] = AMPP_FUNCTION(!A1L7, LB1_state[4], LB1_state[3], A1L9, VCC);


--G1_jtag_debug_mode is sld_hub:sld_hub_inst|jtag_debug_mode
--operation mode is normal

G1_jtag_debug_mode = AMPP_FUNCTION(!A1L7, G1L25, G1_jtag_debug_mode, G1L26, LB1_state[15], LB1_state[0]);


--JB2_Q[0] is sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]
--operation mode is normal

JB2_Q[0] = AMPP_FUNCTION(!A1L7, JB2L3, JB2_Q[0], JB1L3, G1L18, G1_CLRN_SIGNAL);


--G1L27 is sld_hub:sld_hub_inst|node_ena~24
--operation mode is normal

G1L27 = AMPP_FUNCTION(JB6_Q[0], G1_jtag_debug_mode, JB2_Q[0]);


--JB4_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0]
--operation mode is normal

JB4_Q[0] = AMPP_FUNCTION(!A1L7, JB5_Q[0], JB3_Q[0], JB2_Q[0], G1_CLRN_SIGNAL, G1L19);


--B1_reset_all is sld_signaltap:auto_signaltap_0|reset_all
--operation mode is normal

B1_reset_all = AMPP_FUNCTION(JB4_Q[0], G1_CLRN_SIGNAL);


--JB5_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[5]
--operation mode is normal

JB5_Q[5] = AMPP_FUNCTION(!A1L7, JB3_Q[5], G1_CLRN_SIGNAL, G1L4);


--JB3_Q[5] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[5]
--operation mode is normal

JB3_Q[5] = AMPP_FUNCTION(!A1L7, LB1_state[4], JB3_Q[6], G1_CLRN_SIGNAL, JB3L4);


--G1L5 is sld_hub:sld_hub_inst|GEN_SHADOW_IRF~13
--operation mode is normal

G1L5 = AMPP_FUNCTION(G1_OK_TO_UPDATE_IR_Q, LB1_state[5]);


--MB1_dffe1a[2] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_bje:auto_generated|dffe1a[2]
--operation mode is normal

MB1_dffe1a[2] = AMPP_FUNCTION(!A1L7, JB3_Q[2], G1L25, JB3_Q[3], JB3_Q[1], G1_CLRN_SIGNAL, G1L3);


--G1L18 is sld_hub:sld_hub_inst|IRF_ENABLE[1]~70
--operation mode is normal

G1L18 = AMPP_FUNCTION(JB7_Q[0], MB1_dffe1a[2]);


--G1L19 is sld_hub:sld_hub_inst|IRF_ENABLE[1]~71
--operation mode is normal

G1L19 = AMPP_FUNCTION(G1L5, G1L18, JB6_Q[0], JB2_Q[0]);


--JB5_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[3]
--operation mode is normal

JB5_Q[3] = AMPP_FUNCTION(!A1L7, JB3_Q[3], G1_CLRN_SIGNAL, G1L4);


--JB3_Q[3] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[3]
--operation mode is normal

JB3_Q[3] = AMPP_FUNCTION(!A1L7, JB3_Q[4], LB1_state[4], W1_trigger_happened_ff[0], W1L8, G1_CLRN_SIGNAL, JB3L4);


--JB5_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[4]
--operation mode is normal

JB5_Q[4] = AMPP_FUNCTION(!A1L7, JB3_Q[4], G1_CLRN_SIGNAL, G1L4);


--JB3_Q[4] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[4]
--operation mode is normal

JB3_Q[4] = AMPP_FUNCTION(!A1L7, JB3_Q[5], W1L8, LB1_state[4], G1_CLRN_SIGNAL, JB3L4);


--P1_dffs[1] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[1]
--operation mode is normal

P1_dffs[1] = AMPP_FUNCTION(!A1L7, P1_dffs[2], !B1_reset_all, L1_trigger_setup_ena);


--L1_trigger_setup_ena is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|trigger_setup_ena
--operation mode is normal

L1_trigger_setup_ena = AMPP_FUNCTION(LB1_state[4], JB4_Q[3], G1L27, G1_jtag_debug_mode_usr1);


--K1_WORD_SR[1] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[1]
--operation mode is normal

K1_WORD_SR[1] = AMPP_FUNCTION(!A1L7, K1_WORD_SR[2], K1L17, LB1_state[4], K2_clear_signal, VCC, K1L13);