v_fpga.map.eqn

自己写的iic配置芯片的源程序

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--C1_HTIDCK is v_transfer:inst|HTIDCK
--operation mode is normal

C1_HTIDCK_lut_out = HRODCK;
C1_HTIDCK = DFFEAS(C1_HTIDCK_lut_out, HRODCK, VCC, , , , , , );


--C1_HTDE is v_transfer:inst|HTDE
--operation mode is normal

C1_HTDE_lut_out = HRDE;
C1_HTDE = DFFEAS(C1_HTDE_lut_out, HRODCK, VCC, , , , , , );


--C1_HTHSYNC is v_transfer:inst|HTHSYNC
--operation mode is normal

C1_HTHSYNC_lut_out = HRHSYNC;
C1_HTHSYNC = DFFEAS(C1_HTHSYNC_lut_out, HRODCK, VCC, , , , , , );


--C1_HTVSYNC is v_transfer:inst|HTVSYNC
--operation mode is normal

C1_HTVSYNC_lut_out = HRVSYNC;
C1_HTVSYNC = DFFEAS(C1_HTVSYNC_lut_out, HRODCK, VCC, , , , , , );


--F1_en is counter:inst6|en
--operation mode is normal

F1_en_lut_out = F1_en $ (!F1_a[0] & A1L99 & F1_a[1]);
F1_en = DFFEAS(F1_en_lut_out, CLK27, VCC, , , , , , );


--F1_HRRESET is counter:inst6|HRRESET
--operation mode is normal

F1_HRRESET_lut_out = A1L98;
F1_HRRESET = DFFEAS(F1_HRRESET_lut_out, CLK27, VCC, , , , , , );


--E1_WrDone is sim_i2c:inst3|WrDone
--operation mode is normal

E1_WrDone_lut_out = E1_state.stop_a # E1_state.stop_b # E1_\nxt_state_decoder:done & E1_state.idle;
E1_WrDone = DFFEAS(E1_WrDone_lut_out, F1_en, VCC, , F1_HRRESET, , , , );


--C1_HTD[23] is v_transfer:inst|HTD[23]
--operation mode is normal

C1_HTD[23]_lut_out = HRQE[23];
C1_HTD[23] = DFFEAS(C1_HTD[23]_lut_out, HRODCK, VCC, , , , , , );


--C1_HTD[22] is v_transfer:inst|HTD[22]
--operation mode is normal

C1_HTD[22]_lut_out = HRQE[22];
C1_HTD[22] = DFFEAS(C1_HTD[22]_lut_out, HRODCK, VCC, , , , , , );


--C1_HTD[21] is v_transfer:inst|HTD[21]
--operation mode is normal

C1_HTD[21]_lut_out = HRQE[21];
C1_HTD[21] = DFFEAS(C1_HTD[21]_lut_out, HRODCK, VCC, , , , , , );


--C1_HTD[20] is v_transfer:inst|HTD[20]
--operation mode is normal

C1_HTD[20]_lut_out = HRQE[20];
C1_HTD[20] = DFFEAS(C1_HTD[20]_lut_out, HRODCK, VCC, , , , , , );


--C1_HTD[19] is v_transfer:inst|HTD[19]
--operation mode is normal

C1_HTD[19]_lut_out = HRQE[19];
C1_HTD[19] = DFFEAS(C1_HTD[19]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[14] is v_transfer:inst|VDTI[14]
--operation mode is normal

C1_VDTI[14]_lut_out = HRQE[18];
C1_VDTI[14] = DFFEAS(C1_VDTI[14]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[13] is v_transfer:inst|VDTI[13]
--operation mode is normal

C1_VDTI[13]_lut_out = HRQE[17];
C1_VDTI[13] = DFFEAS(C1_VDTI[13]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[12] is v_transfer:inst|VDTI[12]
--operation mode is normal

C1_VDTI[12]_lut_out = HRQE[16];
C1_VDTI[12] = DFFEAS(C1_VDTI[12]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[11] is v_transfer:inst|VDTI[11]
--operation mode is normal

C1_VDTI[11]_lut_out = HRQE[15];
C1_VDTI[11] = DFFEAS(C1_VDTI[11]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[10] is v_transfer:inst|VDTI[10]
--operation mode is normal

C1_VDTI[10]_lut_out = HRQE[14];
C1_VDTI[10] = DFFEAS(C1_VDTI[10]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[9] is v_transfer:inst|VDTI[9]
--operation mode is normal

C1_VDTI[9]_lut_out = HRQE[13];
C1_VDTI[9] = DFFEAS(C1_VDTI[9]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[8] is v_transfer:inst|VDTI[8]
--operation mode is normal

C1_VDTI[8]_lut_out = HRQE[12];
C1_VDTI[8] = DFFEAS(C1_VDTI[8]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[7] is v_transfer:inst|VDTI[7]
--operation mode is normal

C1_VDTI[7]_lut_out = HRQE[11];
C1_VDTI[7] = DFFEAS(C1_VDTI[7]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[6] is v_transfer:inst|VDTI[6]
--operation mode is normal

C1_VDTI[6]_lut_out = HRQE[10];
C1_VDTI[6] = DFFEAS(C1_VDTI[6]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[5] is v_transfer:inst|VDTI[5]
--operation mode is normal

C1_VDTI[5]_lut_out = HRQE[9];
C1_VDTI[5] = DFFEAS(C1_VDTI[5]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[4] is v_transfer:inst|VDTI[4]
--operation mode is normal

C1_VDTI[4]_lut_out = HRQE[8];
C1_VDTI[4] = DFFEAS(C1_VDTI[4]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[3] is v_transfer:inst|VDTI[3]
--operation mode is normal

C1_VDTI[3]_lut_out = HRQE[7];
C1_VDTI[3] = DFFEAS(C1_VDTI[3]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[2] is v_transfer:inst|VDTI[2]
--operation mode is normal

C1_VDTI[2]_lut_out = HRQE[6];
C1_VDTI[2] = DFFEAS(C1_VDTI[2]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[1] is v_transfer:inst|VDTI[1]
--operation mode is normal

C1_VDTI[1]_lut_out = HRQE[5];
C1_VDTI[1] = DFFEAS(C1_VDTI[1]_lut_out, HRODCK, VCC, , , , , , );


--C1_VDTI[0] is v_transfer:inst|VDTI[0]
--operation mode is normal

C1_VDTI[0]_lut_out = HRQE[4];
C1_VDTI[0] = DFFEAS(C1_VDTI[0]_lut_out, HRODCK, VCC, , , , , , );


--C1_HTD[3] is v_transfer:inst|HTD[3]
--operation mode is normal

C1_HTD[3]_lut_out = HRQE[3];
C1_HTD[3] = DFFEAS(C1_HTD[3]_lut_out, HRODCK, VCC, , , , , , );


--C1_HTD[2] is v_transfer:inst|HTD[2]
--operation mode is normal

C1_HTD[2]_lut_out = HRQE[2];
C1_HTD[2] = DFFEAS(C1_HTD[2]_lut_out, HRODCK, VCC, , , , , , );


--C1_HTD[1] is v_transfer:inst|HTD[1]
--operation mode is normal

C1_HTD[1]_lut_out = HRQE[1];
C1_HTD[1] = DFFEAS(C1_HTD[1]_lut_out, HRODCK, VCC, , , , , , );


--C1_HTD[0] is v_transfer:inst|HTD[0]
--operation mode is normal

C1_HTD[0]_lut_out = HRQE[0];
C1_HTD[0] = DFFEAS(C1_HTD[0]_lut_out, HRODCK, VCC, , , , , , );


--E1_i[4] is sim_i2c:inst3|i[4]
--operation mode is normal

E1_i[4]_lut_out = E1L26;
E1_i[4] = DFFEAS(E1_i[4]_lut_out, E1_WrDone, VCC, , , , , , );


--E1_i[3] is sim_i2c:inst3|i[3]
--operation mode is normal

E1_i[3]_lut_out = E1L27;
E1_i[3] = DFFEAS(E1_i[3]_lut_out, E1_WrDone, VCC, , , , , , );


--E1_i[2] is sim_i2c:inst3|i[2]
--operation mode is normal

E1_i[2]_lut_out = E1L28;
E1_i[2] = DFFEAS(E1_i[2]_lut_out, E1_WrDone, VCC, , , , , , );


--E1_i[1] is sim_i2c:inst3|i[1]
--operation mode is normal

E1_i[1]_lut_out = E1L29;
E1_i[1] = DFFEAS(E1_i[1]_lut_out, E1_WrDone, VCC, , , , , , );


--E1_i[0] is sim_i2c:inst3|i[0]
--operation mode is normal

E1_i[0]_lut_out = !E1_i[0];
E1_i[0] = DFFEAS(E1_i[0]_lut_out, E1_WrDone, VCC, , , , , , );


--A1L8 is altera_internal_jtag~TDO
A1L8 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, altera_reserved_ntrst, , G1L11);

--A1L9 is altera_internal_jtag~TMSUTAP
A1L9 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, altera_reserved_ntrst, , G1L11);

--A1L7 is altera_internal_jtag~TCKUTAP
A1L7 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, altera_reserved_ntrst, , G1L11);

--altera_internal_jtag is altera_internal_jtag
altera_internal_jtag = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, altera_reserved_ntrst, , G1L11);


--F1_a[0] is counter:inst6|a[0]
--operation mode is normal

F1_a[0]_lut_out = F1L8 & (F1_a[0] # !F1_a[1] # !A1L99);
F1_a[0] = DFFEAS(F1_a[0]_lut_out, CLK27, VCC, , , , , , );


--F1_a[5] is counter:inst6|a[5]
--operation mode is normal

F1_a[5]_lut_out = F1L10 & (F1_a[0] # !F1_a[1] # !A1L99);
F1_a[5] = DFFEAS(F1_a[5]_lut_out, CLK27, VCC, , , , , , );


--F1_a[4] is counter:inst6|a[4]
--operation mode is normal

F1_a[4]_lut_out = F1L11;
F1_a[4] = DFFEAS(F1_a[4]_lut_out, CLK27, VCC, , , , , , );


--F1_a[3] is counter:inst6|a[3]
--operation mode is normal

F1_a[3]_lut_out = F1L13;
F1_a[3] = DFFEAS(F1_a[3]_lut_out, CLK27, VCC, , , , , , );


--F1_a[2] is counter:inst6|a[2]
--operation mode is normal

F1_a[2]_lut_out = F1L15;
F1_a[2] = DFFEAS(F1_a[2]_lut_out, CLK27, VCC, , , , , , );


--A1L99 is rtl~457
--operation mode is normal

A1L99 = F1_a[5] & !F1_a[4] & !F1_a[3] & !F1_a[2];


--F1_a[1] is counter:inst6|a[1]
--operation mode is normal

F1_a[1]_lut_out = F1L17 & (F1_a[0] # !F1_a[1] # !A1L99);
F1_a[1] = DFFEAS(F1_a[1]_lut_out, CLK27, VCC, , , , , , );


--F1_b[26] is counter:inst6|b[26]
--operation mode is normal

F1_b[26]_lut_out = F1L19;
F1_b[26] = DFFEAS(F1_b[26]_lut_out, CLK27, VCC, , , , , , );


--F1_b[25] is counter:inst6|b[25]
--operation mode is normal

F1_b[25]_lut_out = F1L20;
F1_b[25] = DFFEAS(F1_b[25]_lut_out, CLK27, VCC, , , , , , );


--F1_b[24] is counter:inst6|b[24]
--operation mode is normal

F1_b[24]_lut_out = F1L22;
F1_b[24] = DFFEAS(F1_b[24]_lut_out, CLK27, VCC, , , , , , );


--F1_b[23] is counter:inst6|b[23]
--operation mode is normal

F1_b[23]_lut_out = F1L24;
F1_b[23] = DFFEAS(F1_b[23]_lut_out, CLK27, VCC, , , , , , );


--A1L100 is rtl~458
--operation mode is normal

A1L100 = !F1_b[26] & !F1_b[25] & !F1_b[24] & !F1_b[23];


--F1_b[22] is counter:inst6|b[22]
--operation mode is normal

F1_b[22]_lut_out = F1L26;
F1_b[22] = DFFEAS(F1_b[22]_lut_out, CLK27, VCC, , , , , , );


--F1_b[21] is counter:inst6|b[21]
--operation mode is normal

F1_b[21]_lut_out = F1L28;
F1_b[21] = DFFEAS(F1_b[21]_lut_out, CLK27, VCC, , , , , , );


--F1_b[20] is counter:inst6|b[20]
--operation mode is normal

F1_b[20]_lut_out = F1L30;
F1_b[20] = DFFEAS(F1_b[20]_lut_out, CLK27, VCC, , , , , , );


--F1_b[19] is counter:inst6|b[19]
--operation mode is normal

F1_b[19]_lut_out = F1L32;
F1_b[19] = DFFEAS(F1_b[19]_lut_out, CLK27, VCC, , , , , , );


--A1L101 is rtl~459
--operation mode is normal

A1L101 = !F1_b[22] & !F1_b[21] & !F1_b[20] & !F1_b[19];


--F1_b[18] is counter:inst6|b[18]
--operation mode is normal

F1_b[18]_lut_out = F1L34;
F1_b[18] = DFFEAS(F1_b[18]_lut_out, CLK27, VCC, , , , , , );


--F1_b[17] is counter:inst6|b[17]
--operation mode is normal

F1_b[17]_lut_out = F1L36;
F1_b[17] = DFFEAS(F1_b[17]_lut_out, CLK27, VCC, , , , , , );


--F1_b[16] is counter:inst6|b[16]
--operation mode is normal

F1_b[16]_lut_out = F1L38;
F1_b[16] = DFFEAS(F1_b[16]_lut_out, CLK27, VCC, , , , , , );


--F1_b[15] is counter:inst6|b[15]
--operation mode is normal

F1_b[15]_lut_out = F1L40;
F1_b[15] = DFFEAS(F1_b[15]_lut_out, CLK27, VCC, , , , , , );


--A1L102 is rtl~460
--operation mode is normal

A1L102 = !F1_b[18] & !F1_b[17] & !F1_b[16] & !F1_b[15];


--F1_b[14] is counter:inst6|b[14]
--operation mode is normal

F1_b[14]_lut_out = F1L42;
F1_b[14] = DFFEAS(F1_b[14]_lut_out, CLK27, VCC, , , , , , );


--F1_b[13] is counter:inst6|b[13]
--operation mode is normal

F1_b[13]_lut_out = F1L44;
F1_b[13] = DFFEAS(F1_b[13]_lut_out, CLK27, VCC, , , , , , );


--F1_b[12] is counter:inst6|b[12]
--operation mode is normal

F1_b[12]_lut_out = F1L46;
F1_b[12] = DFFEAS(F1_b[12]_lut_out, CLK27, VCC, , , , , , );


--F1_b[11] is counter:inst6|b[11]
--operation mode is normal

F1_b[11]_lut_out = F1L48;
F1_b[11] = DFFEAS(F1_b[11]_lut_out, CLK27, VCC, , , , , , );


--A1L103 is rtl~461