📄 iic.vhd
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LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY IIC IS
PORT
(
DATA : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
CLK : IN STD_LOGIC;--100kHZ
CLK2 : IN STD_LOGIC;--3MHZ,用作延时计数
MODE : IN STD_LOGIC;--0编码,1解码
CONF : IN STD_LOGIC;
CSDA : INOUT STD_LOGIC;--数据
CSCL : INOUT STD_LOGIC; --时钟
CLKROM : OUT STD_LOGIC;
RS : OUT STD_LOGIC;--重启动信号
ADDR : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
PROBE : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)
-- PROBE2 : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)
);
END IIC;
architecture art of IIC is
TYPE STA IS(S0,S1,S2,S3);
SIGNAL STATE : STA; -- : INTEGER RANGE 0 TO 3;--四个状态。空,起始,忙,结束
SIGNAL ACK : INTEGER RANGE 0 TO 2;
SIGNAL COUNT,DELAY1,DELAY2 : INTEGER RANGE 0 TO 9;--COUNT用于发送bit计数,DELAY用作延时计数
SIGNAL ADD : STD_LOGIC_VECTOR(8 DOWNTO 0);
--SIGNAL RS : INTEGER RANGE 0 TO 1;
BEGIN
CSCL<=CLK;
ADDR<=ADD;
PROBE <=CONV_STD_LOGIC_VECTOR(COUNT,4);
-- PROBE2<=CONV_STD_LOGIC_VECTOR(DELAY1,4);
PROCESS(CLK2,CLK)
BEGIN
IF(CLK='0')THEN
DELAY1<=0;
-- IF(CLK='1')THEN
ELSIF(CLK2'EVENT AND CLK2='1')THEN
DELAY1<=DELAY1+1;
-- END IF;
END if;
END PROCESS;
PROCESS(CLK2,CLK)
BEGIN
IF(CLK='1')THEN
DELAY2<=0;
--IF(CLK='0')THEN
ELSIF(CLK2'EVENT AND CLK2='1')THEN
DELAY2<=DELAY2+1;
-- END IF;
END if;
END PROCESS;
PROCESS(STATE,CLK)
BEGIN
IF(STATE=S0) THEN
COUNT<=0;
ELSIF(CLK'EVENT AND CLK='0')THEN
IF((STATE=S1 OR STATE=S2 )) THEN --总在低电平时发信号
COUNT<=COUNT+1;
ELSIF( STATE=S3) THEN --总在低电平时发信号
IF(ACK<2)THEN
COUNT<=1;
ELSE
COUNT<=0;
END IF;
END IF;
END if;
END PROCESS;
PROCESS(CONF,COUNT,ACK)
BEGIN
IF(CONF='0') THEN
STATE<=S0;
ELSE
IF(CLK2'EVENT AND CLK2='1')THEN
IF(COUNT=9)THEN
STATE<=S3;
ELSIF(COUNT=0 )THEN--起始信号,较时钟上升沿再后一点
STATE<=S1;--TINGZHI
ELSE
STATE<=S2;
END IF;
END IF;
END IF;
END PROCESS;
PROCESS(STATE,DELAY1,DELAY2,DATA,COUNT)
-- VARIABLE CNT :INTEGER RANGE 0 TO 9;
BEGIN
-- CNT:=COUNT;
CASE STATE IS
WHEN S0 =>
CSDA<='1';
WHEN S1 =>
IF (DELAY1>1) THEN
CSDA<='0';
-- ELSE
-- CSDA<='1';
END IF;
WHEN S2 =>
IF DELAY2>1 THEN
CSDA<=DATA(8-COUNT);
END IF;
WHEN S3=>
CSDA<='Z';
END CASE;
-- IF(STATE=0)THEN
-- CSDA<='1';
-- ELSIF(STATE=1 AND DELAY1=2)THEN
-- IF(DELAY1>1 )THEN
-- CSDA<='0';
-- ELSE
-- CSDA<='1';
-- END IF;
-- ELSIF(STATE=2)THEN
-- IF(DELAY2>1)THEN
-- CSDA<=DATA(8-COUNT);
-- END IF;
-- ELSIF(STATE=3)THEN
-- ELSE
-- CSDA<='Z';
-- END IF;
END PROCESS;
PROCESS(STATE,CLK,CSDA)
BEGIN
-- ADDR<=ADD;
IF(STATE=S3)THEN
-- ADD<="0000";
IF(CLK'EVENT AND CLK='1')THEN
IF(CSDA='0')THEN
ADD<=ADD+'1';
-- ADDR<=ADD;
ELSE
ADD<="000000000";
-- CLKROM<='1';
END IF;
END IF;
END IF;
-- ADD<=TMP;
END PROCESS;
PROCESS(STATE,CSDA,CLK,DELAY1)
BEGIN
IF(STATE=S3)THEN
-- IF(DELAY1>1)THEN
IF(CSDA='1')THEN
IF(DELAY1>3)THEN
ACK<=2;--no确认
END IF;
ELSE
-- IF(DELAY1>3)THEN
ACK<=1;--确认
END IF;
ELSE
ACK<=0;
END IF;
END PROCESS;
PROCESS(STATE,CLK2)
BEGIN
-- IF(CLK2'EVENT AND CLK2='1')THEN
IF(STATE=S2)THEN
CLKROM<='1';
ELSE
CLKROM<='0';
END IF;
-- END IF;
END PROCESS;
-- PROCESS(CONF,ACK,STATE)
-- BEGIN
-- IF(CONF='0')THEN
-- RS<='0';
-- ELSE
-- IF(STATE=S3)THEN
-- IF(ACK=2)THEN
-- RS<='1';
-- ELSIF(ACK=1)THEN
-- RS<='0';
-- END IF;
-- ELSE
-- RS<='0';
-- END IF;
-- ELSE
-- RS<='0';
-- END IF;
-- END IF;
--- END PROCESS;
END;
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