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📄 v_fpga.fit.eqn

📁 自己写的iic配置芯片的源程序
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--C1_HTIDCK is v_transfer:inst|HTIDCK at LC_X25_Y30_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_HTIDCK_lut_out = GND;
C1_HTIDCK = DFFEAS(C1_HTIDCK_lut_out, GLOBAL(HRODCK), VCC, , , HRODCK, , , VCC);


--C1_HTDE is v_transfer:inst|HTDE at LC_X31_Y24_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_HTDE_lut_out = GND;
C1_HTDE = DFFEAS(C1_HTDE_lut_out, GLOBAL(HRODCK), VCC, , , HRDE, , , VCC);


--C1_HTHSYNC is v_transfer:inst|HTHSYNC at LC_X18_Y13_N2
--operation mode is normal

C1_HTHSYNC_lut_out = HRHSYNC;
C1_HTHSYNC = DFFEAS(C1_HTHSYNC_lut_out, GLOBAL(HRODCK), VCC, , , , , , );


--C1_HTVSYNC is v_transfer:inst|HTVSYNC at LC_X44_Y14_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_HTVSYNC_lut_out = GND;
C1_HTVSYNC = DFFEAS(C1_HTVSYNC_lut_out, GLOBAL(HRODCK), VCC, , , HRVSYNC, , , VCC);


--F1_en is counter:inst6|en at LC_X1_Y17_N2
--operation mode is normal

F1_en_lut_out = F1_en $ (!F1_a[0] & A1L99 & F1_a[1]);
F1_en = DFFEAS(F1_en_lut_out, GLOBAL(CLK27), VCC, , , , , , );


--E1_WrDone is sim_i2c:inst3|WrDone at LC_X5_Y16_N9
--operation mode is normal

E1_WrDone_lut_out = E1_state.stop_b # E1_state.stop_a # E1_state.idle & E1_\nxt_state_decoder:done;
E1_WrDone = DFFEAS(E1_WrDone_lut_out, GLOBAL(F1_en), VCC, , F1_HRRESET, , , , );


--C1_HTD[23] is v_transfer:inst|HTD[23] at LC_X39_Y30_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_HTD[23]_lut_out = GND;
C1_HTD[23] = DFFEAS(C1_HTD[23]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[23], , , VCC);


--C1_HTD[22] is v_transfer:inst|HTD[22] at LC_X52_Y30_N4
--operation mode is normal

C1_HTD[22]_lut_out = HRQE[22];
C1_HTD[22] = DFFEAS(C1_HTD[22]_lut_out, GLOBAL(HRODCK), VCC, , , , , , );


--C1_HTD[21] is v_transfer:inst|HTD[21] at LC_X8_Y13_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_HTD[21]_lut_out = GND;
C1_HTD[21] = DFFEAS(C1_HTD[21]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[21], , , VCC);


--C1_HTD[20] is v_transfer:inst|HTD[20] at LC_X41_Y11_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_HTD[20]_lut_out = GND;
C1_HTD[20] = DFFEAS(C1_HTD[20]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[20], , , VCC);


--C1_HTD[19] is v_transfer:inst|HTD[19] at LC_X1_Y2_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_HTD[19]_lut_out = GND;
C1_HTD[19] = DFFEAS(C1_HTD[19]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[19], , , VCC);


--C1_VDTI[14] is v_transfer:inst|VDTI[14] at LC_X1_Y22_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_VDTI[14]_lut_out = GND;
C1_VDTI[14] = DFFEAS(C1_VDTI[14]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[18], , , VCC);


--C1_VDTI[13] is v_transfer:inst|VDTI[13] at LC_X30_Y24_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_VDTI[13]_lut_out = GND;
C1_VDTI[13] = DFFEAS(C1_VDTI[13]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[17], , , VCC);


--C1_VDTI[12] is v_transfer:inst|VDTI[12] at LC_X2_Y30_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_VDTI[12]_lut_out = GND;
C1_VDTI[12] = DFFEAS(C1_VDTI[12]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[16], , , VCC);


--C1_VDTI[11] is v_transfer:inst|VDTI[11] at LC_X12_Y28_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_VDTI[11]_lut_out = GND;
C1_VDTI[11] = DFFEAS(C1_VDTI[11]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[15], , , VCC);


--C1_VDTI[10] is v_transfer:inst|VDTI[10] at LC_X17_Y8_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_VDTI[10]_lut_out = GND;
C1_VDTI[10] = DFFEAS(C1_VDTI[10]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[14], , , VCC);


--C1_VDTI[9] is v_transfer:inst|VDTI[9] at LC_X14_Y8_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_VDTI[9]_lut_out = GND;
C1_VDTI[9] = DFFEAS(C1_VDTI[9]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[13], , , VCC);


--C1_VDTI[8] is v_transfer:inst|VDTI[8] at LC_X36_Y6_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_VDTI[8]_lut_out = GND;
C1_VDTI[8] = DFFEAS(C1_VDTI[8]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[12], , , VCC);


--C1_VDTI[7] is v_transfer:inst|VDTI[7] at LC_X44_Y27_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_VDTI[7]_lut_out = GND;
C1_VDTI[7] = DFFEAS(C1_VDTI[7]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[11], , , VCC);


--C1_VDTI[6] is v_transfer:inst|VDTI[6] at LC_X3_Y25_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_VDTI[6]_lut_out = GND;
C1_VDTI[6] = DFFEAS(C1_VDTI[6]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[10], , , VCC);


--C1_VDTI[5] is v_transfer:inst|VDTI[5] at LC_X21_Y24_N2
--operation mode is normal

C1_VDTI[5]_lut_out = HRQE[9];
C1_VDTI[5] = DFFEAS(C1_VDTI[5]_lut_out, GLOBAL(HRODCK), VCC, , , , , , );


--C1_VDTI[4] is v_transfer:inst|VDTI[4] at LC_X3_Y27_N2
--operation mode is normal

C1_VDTI[4]_lut_out = HRQE[8];
C1_VDTI[4] = DFFEAS(C1_VDTI[4]_lut_out, GLOBAL(HRODCK), VCC, , , , , , );


--C1_VDTI[3] is v_transfer:inst|VDTI[3] at LC_X52_Y14_N2
--operation mode is normal

C1_VDTI[3]_lut_out = HRQE[7];
C1_VDTI[3] = DFFEAS(C1_VDTI[3]_lut_out, GLOBAL(HRODCK), VCC, , , , , , );


--C1_VDTI[2] is v_transfer:inst|VDTI[2] at LC_X18_Y29_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_VDTI[2]_lut_out = GND;
C1_VDTI[2] = DFFEAS(C1_VDTI[2]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[6], , , VCC);


--C1_VDTI[1] is v_transfer:inst|VDTI[1] at LC_X52_Y10_N4
--operation mode is normal

C1_VDTI[1]_lut_out = HRQE[5];
C1_VDTI[1] = DFFEAS(C1_VDTI[1]_lut_out, GLOBAL(HRODCK), VCC, , , , , , );


--C1_VDTI[0] is v_transfer:inst|VDTI[0] at LC_X52_Y6_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_VDTI[0]_lut_out = GND;
C1_VDTI[0] = DFFEAS(C1_VDTI[0]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[4], , , VCC);


--C1_HTD[3] is v_transfer:inst|HTD[3] at LC_X35_Y19_N2
--operation mode is normal

C1_HTD[3]_lut_out = HRQE[3];
C1_HTD[3] = DFFEAS(C1_HTD[3]_lut_out, GLOBAL(HRODCK), VCC, , , , , , );


--C1_HTD[2] is v_transfer:inst|HTD[2] at LC_X47_Y11_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_HTD[2]_lut_out = GND;
C1_HTD[2] = DFFEAS(C1_HTD[2]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[2], , , VCC);


--C1_HTD[1] is v_transfer:inst|HTD[1] at LC_X52_Y27_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_HTD[1]_lut_out = GND;
C1_HTD[1] = DFFEAS(C1_HTD[1]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[1], , , VCC);


--C1_HTD[0] is v_transfer:inst|HTD[0] at LC_X1_Y30_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_HTD[0]_lut_out = GND;
C1_HTD[0] = DFFEAS(C1_HTD[0]_lut_out, GLOBAL(HRODCK), VCC, , , HRQE[0], , , VCC);


--E1_i[0] is sim_i2c:inst3|i[0] at LC_X9_Y8_N8
--operation mode is normal

E1_i[0]_lut_out = !E1_i[0];
E1_i[0] = DFFEAS(E1_i[0]_lut_out, GLOBAL(E1_WrDone), VCC, , , , , , );


--A1L8 is altera_internal_jtag~TDO at ELA_X0_Y15_N0
A1L8 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, altera_reserved_ntrst, , G1L11);

--A1L9 is altera_internal_jtag~TMSUTAP at ELA_X0_Y15_N0
A1L9 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, altera_reserved_ntrst, , G1L11);

--A1L7 is altera_internal_jtag~TCKUTAP at ELA_X0_Y15_N0
A1L7 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, altera_reserved_ntrst, , G1L11);

--altera_internal_jtag is altera_internal_jtag at ELA_X0_Y15_N0
altera_internal_jtag = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, altera_reserved_ntrst, , G1L11);


--F1_a[0] is counter:inst6|a[0] at LC_X1_Y14_N7
--operation mode is normal

F1_a[0]_lut_out = F1L8 & (F1_a[0] # !F1_a[1] # !A1L99);
F1_a[0] = DFFEAS(F1_a[0]_lut_out, GLOBAL(CLK27), VCC, , , , , , );


--F1_a[5] is counter:inst6|a[5] at LC_X1_Y14_N0
--operation mode is normal

F1_a[5]_lut_out = F1L11 & (F1_a[0] # !F1_a[1] # !A1L99);
F1_a[5] = DFFEAS(F1_a[5]_lut_out, GLOBAL(CLK27), VCC, , , , , , );


--F1_a[3] is counter:inst6|a[3] at LC_X1_Y13_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

F1_a[3]_lut_out = GND;
F1_a[3] = DFFEAS(F1_a[3]_lut_out, GLOBAL(CLK27), VCC, , , F1L15, , , VCC);


--F1_a[2] is counter:inst6|a[2] at LC_X2_Y14_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

F1_a[2]_lut_out = GND;
F1_a[2] = DFFEAS(F1_a[2]_lut_out, GLOBAL(CLK27), VCC, , , F1L19, , , VCC);


--A1L99 is rtl~457 at LC_X1_Y14_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

F1_a[4]_qfbk = F1_a[4];
A1L99 = !F1_a[3] & !F1_a[2] & !F1_a[4]_qfbk & F1_a[5];

--F1_a[4] is counter:inst6|a[4] at LC_X1_Y14_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

F1_a[4] = DFFEAS(A1L99, GLOBAL(CLK27), VCC, , , F1L12, , , VCC);


--F1_a[1] is counter:inst6|a[1] at LC_X1_Y14_N8
--operation mode is normal

F1_a[1]_lut_out = F1L22 & (F1_a[0] # !A1L99 # !F1_a[1]);
F1_a[1] = DFFEAS(F1_a[1]_lut_out, GLOBAL(CLK27), VCC, , , , , , );


--F1_b[25] is counter:inst6|b[25] at LC_X17_Y19_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

F1_b[25]_lut_out = GND;
F1_b[25] = DFFEAS(F1_b[25]_lut_out, GLOBAL(CLK27), VCC, , , F1L26, , , VCC);


--F1_b[24] is counter:inst6|b[24] at LC_X18_Y19_N9
--operation mode is normal

F1_b[24]_lut_out = F1L29;
F1_b[24] = DFFEAS(F1_b[24]_lut_out, GLOBAL(CLK27), VCC, , , , , , );


--F1_b[23] is counter:inst6|b[23] at LC_X17_Y19_N2
--operation mode is normal

F1_b[23]_lut_out = F1L32;
F1_b[23] = DFFEAS(F1_b[23]_lut_out, GLOBAL(CLK27), VCC, , , , , , );


--A1L100 is rtl~458 at LC_X17_Y19_N1
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

F1_b[26]_qfbk = F1_b[26];
A1L100 = !F1_b[23] & !F1_b[24] & !F1_b[26]_qfbk & !F1_b[25];

--F1_b[26] is counter:inst6|b[26] at LC_X17_Y19_N1
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

F1_b[26] = DFFEAS(A1L100, GLOBAL(CLK27), VCC, , , F1L25, , , VCC);


--F1_b[21] is counter:inst6|b[21] at LC_X18_Y22_N2
--operation mode is normal

F1_b[21]_lut_out = F1L37;
F1_b[21] = DFFEAS(F1_b[21]_lut_out, GLOBAL(CLK27), VCC, , , , , , );


--F1_b[20] is counter:inst6|b[20] at LC_X18_Y18_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

F1_b[20]_lut_out = GND;
F1_b[20] = DFFEAS(F1_b[20]_lut_out, GLOBAL(CLK27), VCC, , , F1L40, , , VCC);


--F1_b[19] is counter:inst6|b[19] at LC_X19_Y19_N9
--operation mode is normal

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