small.hier_info

38译码器的设计

reset_n => E_src1[9].ACLR
reset_n => E_src1[8].ACLR
reset_n => E_src1[7].ACLR
reset_n => E_src1[6].ACLR
reset_n => E_src1[5].ACLR
reset_n => E_src1[4].ACLR
reset_n => E_src1[3].ACLR
reset_n => E_src1[2].ACLR
reset_n => E_src1[1].ACLR
reset_n => E_src1[0].ACLR
reset_n => E_src1[31].ACLR
reset_n => E_src2[30].ACLR
reset_n => E_src2[29].ACLR
reset_n => E_src2[28].ACLR
reset_n => E_src2[27].ACLR
reset_n => E_src2[26].ACLR
reset_n => E_src2[25].ACLR
reset_n => E_src2[24].ACLR
reset_n => E_src2[23].ACLR
reset_n => E_src2[22].ACLR
reset_n => E_src2[21].ACLR
reset_n => E_src2[20].ACLR
reset_n => E_src2[19].ACLR
reset_n => E_src2[18].ACLR
reset_n => E_src2[17].ACLR
reset_n => E_src2[16].ACLR
reset_n => E_src2[15].ACLR
reset_n => E_src2[14].ACLR
reset_n => E_src2[13].ACLR
reset_n => E_src2[12].ACLR
reset_n => E_src2[11].ACLR
reset_n => E_src2[10].ACLR
reset_n => E_src2[9].ACLR
reset_n => E_src2[8].ACLR
reset_n => E_src2[7].ACLR
reset_n => E_src2[6].ACLR
reset_n => E_src2[5].ACLR
reset_n => E_src2[4].ACLR
reset_n => E_src2[3].ACLR
reset_n => E_src2[2].ACLR
reset_n => E_src2[1].ACLR
reset_n => E_src2[0].ACLR
reset_n => E_src2[31].ACLR
reset_n => E_invert_arith_src_msb.ACLR
reset_n => E_alu_sub.ACLR
reset_n => E_shift_rot_result[30].ACLR
reset_n => E_shift_rot_result[29].ACLR
reset_n => E_shift_rot_result[28].ACLR
reset_n => E_shift_rot_result[27].ACLR
reset_n => E_shift_rot_result[26].ACLR
reset_n => E_shift_rot_result[25].ACLR
reset_n => E_shift_rot_result[24].ACLR
reset_n => E_shift_rot_result[23].ACLR
reset_n => E_shift_rot_result[22].ACLR
reset_n => E_shift_rot_result[21].ACLR
reset_n => E_shift_rot_result[20].ACLR
reset_n => E_shift_rot_result[19].ACLR
reset_n => E_shift_rot_result[18].ACLR
reset_n => E_shift_rot_result[17].ACLR
reset_n => E_shift_rot_result[16].ACLR
reset_n => E_shift_rot_result[15].ACLR
reset_n => E_shift_rot_result[14].ACLR
reset_n => E_shift_rot_result[13].ACLR
reset_n => E_shift_rot_result[12].ACLR
reset_n => E_shift_rot_result[11].ACLR
reset_n => E_shift_rot_result[10].ACLR
reset_n => E_shift_rot_result[9].ACLR
reset_n => E_shift_rot_result[8].ACLR
reset_n => E_shift_rot_result[7].ACLR
reset_n => E_shift_rot_result[6].ACLR
reset_n => E_shift_rot_result[5].ACLR
reset_n => E_shift_rot_result[4].ACLR
reset_n => E_shift_rot_result[3].ACLR
reset_n => E_shift_rot_result[2].ACLR
reset_n => E_shift_rot_result[1].ACLR
reset_n => E_shift_rot_result[0].ACLR
reset_n => E_shift_rot_result[31].ACLR
reset_n => E_shift_rot_cnt[3].ACLR
reset_n => E_shift_rot_cnt[2].ACLR
reset_n => E_shift_rot_cnt[1].ACLR
reset_n => E_shift_rot_cnt[0].ACLR
reset_n => E_shift_rot_cnt[4].ACLR
reset_n => av_ld_align_cycle[0].ACLR
reset_n => av_ld_align_cycle[1].ACLR
reset_n => av_ld_waiting_for_data.ACLR
reset_n => av_ld_aligning_data.ACLR
reset_n => av_ld_byte0_data[6].ACLR
reset_n => av_ld_byte0_data[5].ACLR
reset_n => av_ld_byte0_data[4].ACLR
reset_n => av_ld_byte0_data[3].ACLR
reset_n => av_ld_byte0_data[2].ACLR
reset_n => av_ld_byte0_data[1].ACLR
reset_n => av_ld_byte0_data[0].ACLR
reset_n => av_ld_byte0_data[7].ACLR
reset_n => av_ld_byte1_data[6].ACLR
reset_n => av_ld_byte1_data[5].ACLR
reset_n => av_ld_byte1_data[4].ACLR
reset_n => av_ld_byte1_data[3].ACLR
reset_n => av_ld_byte1_data[2].ACLR
reset_n => av_ld_byte1_data[1].ACLR
reset_n => av_ld_byte1_data[0].ACLR
reset_n => av_ld_byte1_data[7].ACLR
reset_n => av_ld_byte2_data[6].ACLR
reset_n => av_ld_byte2_data[5].ACLR
reset_n => av_ld_byte2_data[4].ACLR
reset_n => av_ld_byte2_data[3].ACLR
reset_n => av_ld_byte2_data[2].ACLR
reset_n => av_ld_byte2_data[1].ACLR
reset_n => av_ld_byte2_data[0].ACLR
reset_n => av_ld_byte2_data[7].ACLR
reset_n => av_ld_byte3_data[6].ACLR
reset_n => av_ld_byte3_data[5].ACLR
reset_n => av_ld_byte3_data[4].ACLR
reset_n => av_ld_byte3_data[3].ACLR
reset_n => av_ld_byte3_data[2].ACLR
reset_n => av_ld_byte3_data[1].ACLR
reset_n => av_ld_byte3_data[0].ACLR
reset_n => av_ld_byte3_data[7].ACLR
reset_n => W_valid.ACLR
reset_n => W_control_rd_data.ACLR
reset_n => W_cmp_result.ACLR
reset_n => W_status_reg_pie.ACLR
reset_n => W_estatus_reg.ACLR
reset_n => W_bstatus_reg.ACLR
reset_n => W_ienable_reg[30].ACLR
reset_n => W_ienable_reg[29].ACLR
reset_n => W_ienable_reg[28].ACLR
reset_n => W_ienable_reg[27].ACLR
reset_n => W_ienable_reg[26].ACLR
reset_n => W_ienable_reg[25].ACLR
reset_n => W_ienable_reg[24].ACLR
reset_n => W_ienable_reg[23].ACLR
reset_n => W_ienable_reg[22].ACLR
reset_n => W_ienable_reg[21].ACLR
reset_n => W_ienable_reg[20].ACLR
reset_n => W_ienable_reg[19].ACLR
reset_n => W_ienable_reg[18].ACLR
reset_n => W_ienable_reg[17].ACLR
reset_n => W_ienable_reg[16].ACLR
reset_n => W_ienable_reg[15].ACLR
reset_n => W_ienable_reg[14].ACLR
reset_n => W_ienable_reg[13].ACLR
reset_n => W_ienable_reg[12].ACLR
reset_n => W_ienable_reg[11].ACLR
reset_n => W_ienable_reg[10].ACLR
reset_n => W_ienable_reg[9].ACLR
reset_n => W_ienable_reg[8].ACLR
reset_n => W_ienable_reg[7].ACLR
reset_n => W_ienable_reg[6].ACLR
reset_n => W_ienable_reg[5].ACLR
reset_n => W_ienable_reg[4].ACLR
reset_n => W_ienable_reg[3].ACLR
reset_n => W_ienable_reg[2].ACLR
reset_n => W_ienable_reg[1].ACLR
reset_n => W_ienable_reg[0].ACLR
reset_n => W_ienable_reg[31].ACLR
reset_n => W_ipending_reg[30].ACLR
reset_n => W_ipending_reg[29].ACLR
reset_n => W_ipending_reg[28].ACLR
reset_n => W_ipending_reg[27].ACLR
reset_n => W_ipending_reg[26].ACLR
reset_n => W_ipending_reg[25].ACLR
reset_n => W_ipending_reg[24].ACLR
reset_n => W_ipending_reg[23].ACLR
reset_n => W_ipending_reg[22].ACLR
reset_n => W_ipending_reg[21].ACLR
reset_n => W_ipending_reg[20].ACLR
reset_n => W_ipending_reg[19].ACLR
reset_n => W_ipending_reg[18].ACLR
reset_n => W_ipending_reg[17].ACLR
reset_n => W_ipending_reg[16].ACLR
reset_n => W_ipending_reg[15].ACLR
reset_n => W_ipending_reg[14].ACLR
reset_n => W_ipending_reg[13].ACLR
reset_n => W_ipending_reg[12].ACLR
reset_n => W_ipending_reg[11].ACLR
reset_n => W_ipending_reg[10].ACLR
reset_n => W_ipending_reg[9].ACLR
reset_n => W_ipending_reg[8].ACLR
reset_n => W_ipending_reg[7].ACLR
reset_n => W_ipending_reg[6].ACLR
reset_n => W_ipending_reg[5].ACLR
reset_n => W_ipending_reg[4].ACLR
reset_n => W_ipending_reg[3].ACLR
reset_n => W_ipending_reg[2].ACLR
reset_n => W_ipending_reg[1].ACLR
reset_n => W_ipending_reg[0].ACLR
reset_n => W_ipending_reg[31].ACLR
reset_n => R_ctrl_br.ACLR
reset_n => R_ctrl_jmp_direct.ACLR
reset_n => R_ctrl_exception.ACLR
reset_n => R_ctrl_break.ACLR
reset_n => R_ctrl_uncond_cti.ACLR
reset_n => R_ctrl_hi_imm.ACLR
reset_n => R_ctrl_unsigned_lo_imm.ACLR
reset_n => R_ctrl_force_src2_zero.ACLR
reset_n => R_ctrl_retaddr.ACLR
reset_n => R_ctrl_dst_data_sel_cmp.ACLR
reset_n => R_ctrl_dst_data_sel_logic_result.ACLR
reset_n => R_ctrl_wrctl_inst.ACLR
reset_n => R_ctrl_rdctl_inst.ACLR
reset_n => R_ctrl_ld.ACLR
reset_n => R_ctrl_ld_signed.ACLR
reset_n => R_ctrl_ld_non_io.ACLR
reset_n => R_ctrl_st.ACLR
reset_n => R_ctrl_shift_rot.ACLR
reset_n => R_ctrl_rot_right.ACLR
reset_n => R_ctrl_shift_logical.ACLR
reset_n => R_ctrl_shift_rot_right.ACLR
d_address[0] <= W_alu_result[0].DB_MAX_OUTPUT_PORT_TYPE
d_address[1] <= W_alu_result[1].DB_MAX_OUTPUT_PORT_TYPE
d_address[2] <= W_alu_result[2].DB_MAX_OUTPUT_PORT_TYPE
d_address[3] <= W_alu_result[3].DB_MAX_OUTPUT_PORT_TYPE
d_address[4] <= W_alu_result[4].DB_MAX_OUTPUT_PORT_TYPE
d_address[5] <= W_alu_result[5].DB_MAX_OUTPUT_PORT_TYPE
d_address[6] <= W_alu_result[6].DB_MAX_OUTPUT_PORT_TYPE
d_address[7] <= W_alu_result[7].DB_MAX_OUTPUT_PORT_TYPE
d_address[8] <= W_alu_result[8].DB_MAX_OUTPUT_PORT_TYPE
d_address[9] <= W_alu_result[9].DB_MAX_OUTPUT_PORT_TYPE
d_address[10] <= W_alu_result[10].DB_MAX_OUTPUT_PORT_TYPE
d_address[11] <= W_alu_result[11].DB_MAX_OUTPUT_PORT_TYPE
d_address[12] <= W_alu_result[12].DB_MAX_OUTPUT_PORT_TYPE
d_address[13] <= W_alu_result[13].DB_MAX_OUTPUT_PORT_TYPE
d_address[14] <= W_alu_result[14].DB_MAX_OUTPUT_PORT_TYPE
d_byteenable[0] <= internal_d_byteenable[0].DB_MAX_OUTPUT_PORT_TYPE
d_byteenable[1] <= internal_d_byteenable[1].DB_MAX_OUTPUT_PORT_TYPE
d_byteenable[2] <= internal_d_byteenable[2].DB_MAX_OUTPUT_PORT_TYPE
d_byteenable[3] <= internal_d_byteenable[3].DB_MAX_OUTPUT_PORT_TYPE
d_read <= internal_d_read.DB_MAX_OUTPUT_PORT_TYPE
d_write <= cpu_test_bench:the_cpu_test_bench.d_write
d_writedata[0] <= d_writedata[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[1] <= d_writedata[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[2] <= d_writedata[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[3] <= d_writedata[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[4] <= d_writedata[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[5] <= d_writedata[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[6] <= d_writedata[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[7] <= d_writedata[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[8] <= d_writedata[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[9] <= d_writedata[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[10] <= d_writedata[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[11] <= d_writedata[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[12] <= d_writedata[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[13] <= d_writedata[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[14] <= d_writedata[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[15] <= d_writedata[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[16] <= d_writedata[16]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[17] <= d_writedata[17]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[18] <= d_writedata[18]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[19] <= d_writedata[19]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[20] <= d_writedata[20]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[21] <= d_writedata[21]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[22] <= d_writedata[22]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[23] <= d_writedata[23]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[24] <= d_writedata[24]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[25] <= d_writedata[25]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[26] <= d_writedata[26]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[27] <= d_writedata[27]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[28] <= d_writedata[28]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[29] <= d_writedata[29]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[30] <= d_writedata[30]~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_writedata[31] <= d_writedata[31]~reg0.DB_MAX_OUTPUT_PORT_TYPE
i_address[0] <= <GND>
i_address[1] <= <GND>
i_address[2] <= F_pc[0].DB_MAX_OUTPUT_PORT_TYPE
i_address[3] <= F_pc[1].DB_MAX_OUTPUT_PORT_TYPE
i_address[4] <= F_pc[2].DB_MAX_OUTPUT_PORT_TYPE
i_address[5] <= F_pc[3].DB_MAX_OUTPUT_PORT_TYPE
i_address[6] <= F_pc[4].DB_MAX_OUTPUT_PORT_TYPE
i_address[7] <= F_pc[5].DB_MAX_OUTPUT_PORT_TYPE
i_address[8] <= F_pc[6].DB_MAX_OUTPUT_PORT_TYPE
i_address[9] <= F_pc[7].DB_MAX_OUTPUT_PORT_TYPE
i_address[10] <= F_pc[8].DB_MAX_OUTPUT_PORT_TYPE
i_read <= internal_i_read.DB_MAX_OUTPUT_PORT_TYPE


|small|small_2C35:inst|cpu:the_cpu|cpu_test_bench:the_cpu_test_bench
D_iw[0] => ~NO_FANOUT~
D_iw[1] => ~NO_FANOUT~
D_iw[2] => ~NO_FANOUT~
D_iw[3] => ~NO_FANOUT~
D_iw[4] => ~NO_FANOUT~
D_iw[5] => ~NO_FANOUT~
D_iw[6] => ~NO_FANOUT~
D_iw[7] => ~NO_FANOUT~
D_iw[8] => ~NO_FANOUT~
D_iw[9] => ~NO_FANOUT~
D_iw[10] => ~NO_FANOUT~
D_iw[11] => ~NO_FANOUT~
D_iw[12] => ~NO_FANOUT~
D_iw[13] => ~NO_FANOUT~
D_iw[14] => ~NO_FANOUT~
D_iw[15] => ~NO_FANOUT~
D_iw[16] => ~NO_FANOUT~
D_iw[17] => ~NO_FANOUT~
D_iw[18] => ~NO_FANOUT~
D_iw[19] => ~NO_FANOUT~
D_iw[20] => ~NO_FANOUT~
D_iw[21] => ~NO_FANOUT~
D_iw[22] => ~NO_FANOUT~
D_iw[23] => ~NO_FANOUT~
D_iw[24] => ~NO_FANOUT~
D_iw[25] => ~NO_FANOUT~
D_iw[26] => ~NO_FANOUT~
D_iw[27] => ~NO_FANOUT~
D_iw[28] => ~NO_FANOUT~
D_iw[29] => ~NO_FANOUT~
D_iw[30] => ~NO_FANOUT~
D_iw[31] => ~NO_FANOUT~
D_iw_op[0] => ~NO_FANOUT~
D_iw_op[1] => ~NO_FANOUT~
D_iw_op[2] => ~NO_FANOUT~
D_iw_op[3] => ~NO_FANOUT~
D_iw_op[4] => ~NO_FANOUT~
D_iw_op[5] => ~NO_FANOUT~
D_iw_opx[0] => ~NO_FANOUT~
D_iw_opx[1] => ~NO_FANOUT~
D_iw_opx[2] => ~NO_FANOUT~
D_iw_opx[3] => ~NO_FANOUT~
D_iw_opx[4] => ~NO_FANOUT~