📄 small_2c35.vhd
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process (clk, reset_n)
begin
if reset_n = '0' then
cpu_instruction_master_read_last_time <= std_logic'('0');
elsif clk'event and clk = '1' then
if (std_logic_vector'("00000000000000000000000000000001")) /= std_logic_vector'("00000000000000000000000000000000") then
cpu_instruction_master_read_last_time <= cpu_instruction_master_read;
end if;
end if;
end process;
--cpu_instruction_master_read matches last port_name, which is an e_process
process (active_and_waiting_last_time, cpu_instruction_master_read, cpu_instruction_master_read_last_time)
VARIABLE write_line1 : line;
begin
if std_logic'((active_and_waiting_last_time AND to_std_logic(((std_logic'(cpu_instruction_master_read) /= std_logic'(cpu_instruction_master_read_last_time)))))) = '1' then
write(write_line1, now);
write(write_line1, string'(": "));
write(write_line1, string'("cpu_instruction_master_read did not heed wait!!!"));
write(output, write_line1.all);
deallocate (write_line1);
assert false report "VHDL STOP" severity failure;
end if;
end process;
--synthesis translate_on
end europa;
library altera_vhdl_support;
use altera_vhdl_support.altera_vhdl_support_lib.all;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity led_pio_s1_arbitrator is
port (
-- inputs:
signal clk : IN STD_LOGIC;
signal cpu_data_master_address_to_slave : IN STD_LOGIC_VECTOR (14 DOWNTO 0);
signal cpu_data_master_byteenable : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
signal cpu_data_master_read : IN STD_LOGIC;
signal cpu_data_master_waitrequest : IN STD_LOGIC;
signal cpu_data_master_write : IN STD_LOGIC;
signal cpu_data_master_writedata : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
signal reset_n : IN STD_LOGIC;
-- outputs:
signal cpu_data_master_granted_led_pio_s1 : OUT STD_LOGIC;
signal cpu_data_master_qualified_request_led_pio_s1 : OUT STD_LOGIC;
signal cpu_data_master_read_data_valid_led_pio_s1 : OUT STD_LOGIC;
signal cpu_data_master_requests_led_pio_s1 : OUT STD_LOGIC;
signal d1_led_pio_s1_end_xfer : OUT STD_LOGIC;
signal led_pio_s1_address : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
signal led_pio_s1_chipselect : OUT STD_LOGIC;
signal led_pio_s1_reset_n : OUT STD_LOGIC;
signal led_pio_s1_write_n : OUT STD_LOGIC;
signal led_pio_s1_writedata : OUT STD_LOGIC_VECTOR (7 DOWNTO 0)
);
attribute auto_dissolve : boolean;
attribute auto_dissolve of led_pio_s1_arbitrator : entity is FALSE;
end entity led_pio_s1_arbitrator;
architecture europa of led_pio_s1_arbitrator is
signal cpu_data_master_arbiterlock : STD_LOGIC;
signal cpu_data_master_continuerequest : STD_LOGIC;
signal cpu_data_master_saved_grant_led_pio_s1 : STD_LOGIC;
signal d1_reasons_to_wait : STD_LOGIC;
signal in_a_read_cycle : STD_LOGIC;
signal in_a_write_cycle : STD_LOGIC;
signal internal_cpu_data_master_granted_led_pio_s1 : STD_LOGIC;
signal internal_cpu_data_master_qualified_request_led_pio_s1 : STD_LOGIC;
signal internal_cpu_data_master_requests_led_pio_s1 : STD_LOGIC;
signal led_pio_s1_allgrants : STD_LOGIC;
signal led_pio_s1_allow_new_arb_cycle : STD_LOGIC;
signal led_pio_s1_any_continuerequest : STD_LOGIC;
signal led_pio_s1_arb_counter_enable : STD_LOGIC;
signal led_pio_s1_arb_share_counter : STD_LOGIC;
signal led_pio_s1_arb_share_counter_next_value : STD_LOGIC;
signal led_pio_s1_arb_share_set_values : STD_LOGIC;
signal led_pio_s1_arbitration_holdoff_internal : STD_LOGIC;
signal led_pio_s1_beginbursttransfer_internal : STD_LOGIC;
signal led_pio_s1_begins_xfer : STD_LOGIC;
signal led_pio_s1_end_xfer : STD_LOGIC;
signal led_pio_s1_firsttransfer : STD_LOGIC;
signal led_pio_s1_grant_vector : STD_LOGIC;
signal led_pio_s1_in_a_read_cycle : STD_LOGIC;
signal led_pio_s1_in_a_write_cycle : STD_LOGIC;
signal led_pio_s1_master_qreq_vector : STD_LOGIC;
signal led_pio_s1_pretend_byte_enable : STD_LOGIC;
signal led_pio_s1_slavearbiterlockenable : STD_LOGIC;
signal led_pio_s1_waits_for_read : STD_LOGIC;
signal led_pio_s1_waits_for_write : STD_LOGIC;
signal wait_for_led_pio_s1_counter : STD_LOGIC;
begin
process (clk, reset_n)
begin
if reset_n = '0' then
d1_reasons_to_wait <= std_logic'('0');
elsif clk'event and clk = '1' then
if (std_logic_vector'("00000000000000000000000000000001")) /= std_logic_vector'("00000000000000000000000000000000") then
d1_reasons_to_wait <= NOT led_pio_s1_end_xfer;
end if;
end if;
end process;
led_pio_s1_begins_xfer <= NOT d1_reasons_to_wait AND (internal_cpu_data_master_qualified_request_led_pio_s1);
internal_cpu_data_master_requests_led_pio_s1 <= to_std_logic(((Std_Logic_Vector'(cpu_data_master_address_to_slave(14 DOWNTO 4) & std_logic_vector'("0000")) = std_logic_vector'("100000000000000")))) AND ((cpu_data_master_read OR cpu_data_master_write));
--led_pio_s1_arb_share_counter set values, which is an e_mux
led_pio_s1_arb_share_set_values <= std_logic'('1');
--led_pio_s1_arb_share_counter_next_value assignment, which is an e_assign
led_pio_s1_arb_share_counter_next_value <= Vector_To_Std_Logic(A_WE_StdLogicVector((std_logic'(led_pio_s1_firsttransfer) = '1'), (((std_logic_vector'("00000000000000000000000000000000") & (A_TOSTDLOGICVECTOR(led_pio_s1_arb_share_set_values))) - std_logic_vector'("000000000000000000000000000000001"))), A_WE_StdLogicVector((std_logic'(led_pio_s1_arb_share_counter) = '1'), (((std_logic_vector'("00000000000000000000000000000000") & (A_TOSTDLOGICVECTOR(led_pio_s1_arb_share_counter))) - std_logic_vector'("000000000000000000000000000000001"))), std_logic_vector'("000000000000000000000000000000000"))));
--led_pio_s1_allgrants all slave grants, which is an e_mux
led_pio_s1_allgrants <= led_pio_s1_grant_vector;
--led_pio_s1_end_xfer assignment, which is an e_assign
led_pio_s1_end_xfer <= NOT ((led_pio_s1_waits_for_read OR led_pio_s1_waits_for_write));
--led_pio_s1_arb_share_counter arbitration counter enable, which is an e_assign
led_pio_s1_arb_counter_enable <= led_pio_s1_end_xfer AND led_pio_s1_allgrants;
--led_pio_s1_arb_share_counter counter, which is an e_register
process (clk, reset_n)
begin
if reset_n = '0' then
led_pio_s1_arb_share_counter <= std_logic'('0');
elsif clk'event and clk = '1' then
if std_logic'(led_pio_s1_arb_counter_enable) = '1' then
led_pio_s1_arb_share_counter <= led_pio_s1_arb_share_counter_next_value;
end if;
end if;
end process;
--led_pio_s1_slavearbiterlockenable slave enables arbiterlock, which is an e_register
process (clk, reset_n)
begin
if reset_n = '0' then
led_pio_s1_slavearbiterlockenable <= std_logic'('0');
elsif clk'event and clk = '1' then
if std_logic'((led_pio_s1_master_qreq_vector AND led_pio_s1_end_xfer)) = '1' then
led_pio_s1_slavearbiterlockenable <= led_pio_s1_arb_share_counter_next_value;
end if;
end if;
end process;
--cpu/data_master led_pio/s1 arbiterlock, which is an e_assign
cpu_data_master_arbiterlock <= led_pio_s1_slavearbiterlockenable AND cpu_data_master_continuerequest;
--led_pio_s1_any_continuerequest at least one master continues requesting, which is an e_assign
led_pio_s1_any_continuerequest <= std_logic'('0');
--cpu_data_master_continuerequest continued request, which is an e_assign
cpu_data_master_continuerequest <= std_logic'('0');
internal_cpu_data_master_qualified_request_led_pio_s1 <= internal_cpu_data_master_requests_led_pio_s1 AND NOT (((NOT cpu_data_master_waitrequest) AND cpu_data_master_write));
--led_pio_s1_writedata mux, which is an e_mux
led_pio_s1_writedata <= cpu_data_master_writedata (7 DOWNTO 0);
--master is always granted when requested
internal_cpu_data_master_granted_led_pio_s1 <= internal_cpu_data_master_qualified_request_led_pio_s1;
--cpu/data_master saved-grant led_pio/s1, which is an e_assign
cpu_data_master_saved_grant_led_pio_s1 <= internal_cpu_data_master_requests_led_pio_s1;
--allow new arb cycle for led_pio/s1, which is an e_assign
led_pio_s1_allow_new_arb_cycle <= std_logic'('1');
--placeholder chosen master
led_pio_s1_grant_vector <= std_logic'('1');
--placeholder vector of master qualified-requests
led_pio_s1_master_qreq_vector <= std_logic'('1');
--led_pio_s1_reset_n assignment, which is an e_assign
led_pio_s1_reset_n <= reset_n;
led_pio_s1_chipselect <= internal_cpu_data_master_granted_led_pio_s1;
--led_pio_s1_firsttransfer first transaction, which is an e_assign
led_pio_s1_firsttransfer <= NOT ((led_pio_s1_slavearbiterlockenable AND led_pio_s1_any_continuerequest));
--led_pio_s1_beginbursttransfer_internal begin burst transfer, which is an e_assign
led_pio_s1_beginbursttransfer_internal <= led_pio_s1_begins_xfer AND led_pio_s1_firsttransfer;
--led_pio_s1_arbitration_holdoff_internal arbitration_holdoff, which is an e_assign
led_pio_s1_arbitration_holdoff_internal <= led_pio_s1_begins_xfer AND led_pio_s1_firsttransfer;
--~led_pio_s1_write_n assignment, which is an e_mux
led_pio_s1_write_n <= NOT ((((internal_cpu_data_master_granted_led_pio_s1 AND cpu_data_master_write)) AND led_pio_s1_pretend_byte_enable));
--led_pio_s1_address mux, which is an e_mux
led_pio_s1_address <= A_EXT (A_SRL(cpu_data_master_address_to_slave,std_logic_vector'("00000000000000000000000000000010")), 2);
--d1_led_pio_s1_end_xfer register, which is an e_register
process (clk, reset_n)
begin
if reset_n = '0' then
d1_led_pio_s1_end_xfer <= std_logic'('1');
elsif clk'event and clk = '1' then
if (std_logic_vector'("00000000000000000000000000000001")) /= std_logic_vector'("00000000000000000000000000000000") then
d1_led_pio_s1_end_xfer <= led_pio_s1_end_xfer;
end if;
end if;
end process;
--led_pio_s1_waits_for_read in a cycle, which is an e_mux
led_pio_s1_waits_for_read <= led_pio_s1_in_a_read_cycle AND led_pio_s1_begins_xfer;
--led_pio_s1_in_a_read_cycle assignment, which is an e_assign
led_pio_s1_in_a_read_cycle <= internal_cpu_data_master_granted_led_pio_s1 AND cpu_data_master_read;
--in_a_read_cycle assignment, which is an e_mux
in_a_read_cycle <= led_pio_s1_in_a_read_cycle;
--led_pio_s1_waits_for_write in a cycle, which is an e_mux
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