cw.fdo

来自「16位cpu设计VHDL源码」· FDO 代码 · 共 14 行

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Thu Nov 15 13:39:41 中国标准时间 2007
##
vlib work
vcom -93 -explicit  clock.vhdl
vcom -93 -explicit  cw.vhw
vsim -t 1ps   -lib work cw
do cw.udo
view wave
add wave *
view structure
view signals
run -all