vga_colour_bar.map.summary

用verilog hdl实现的VGA显示彩条信号

Analysis & Synthesis Status : Successful - Fri May 16 21:15:15 2008
Quartus II Version : 7.1 Build 178 06/25/2007 SP 1 SJ Full Version
Revision Name : vga_colour_bar
Top-level Entity Name : vga_colour_bar
Family : Stratix II
Logic utilization : N/A
    Combinational ALUTs : 48
    Dedicated logic registers : 26
Total registers : 26
Total pins : 61
Total virtual pins : 0
Total block memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0