sim_tb_top_isim_beh.wfs

来自「Xilinx DDR2存储器接口调试代码」· WFS 代码 · 共 116 行

version 3








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CLOCK_LIST_BEGIN
CLOCK_LIST_END
SIGNAL_LIST_BEGIN
SIGNAL_LIST_END
SIGNALS_NOT_ON_DISPLAY
SIGNALS_NOT_ON_DISPLAY_END
MARKER_LIST_BEGIN
5008000000
5118000000
4692100000
MARKER_LIST_END
MEASURE_LIST_BEGIN
MEASURE_LIST_END
SIGNAL_ORDER_BEGIN
/sim_tb_top/sys_clk
/sim_tb_top/ddr2_reset_n
/sim_tb_top/ddr2_clk
/sim_tb_top/ddr2_clk_n
/sim_tb_top/ddr2_cke
/sim_tb_top/ddr2_dq
/sim_tb_top/ddr2_dm
/sim_tb_top/ddr2_dqs
/sim_tb_top/ddr2_dqs_n
/sim_tb_top/ddr2_ras_n
/sim_tb_top/ddr2_cas_n
/sim_tb_top/ddr2_we_n
/sim_tb_top/ddr2_address
/sim_tb_top/ddr2_ba
/sim_tb_top/ddr2_cs_n
/sim_tb_top/error
/sim_tb_top/cntrl0_data_valid_out
/sim_tb_top/init_done
/sim_tb_top/ddr2_odt
/sim_tb_top/rst_dqs_div_loop
SIGNAL_ORDER_END
DIFFERENTIAL_CLKS_BEGIN
DIFFERENTIAL_CLKS_END
DIVIDERS_BEGIN
DIVIDERS_END
SIGPROPS_BEGIN
/sim_tb_top/sys_clk
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0
/sim_tb_top/ddr2_reset_n
2
0
/sim_tb_top/ddr2_clk
2
0
/sim_tb_top/ddr2_clk_n
2
0
/sim_tb_top/ddr2_cke
2
0
/sim_tb_top/ddr2_dq
2
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/sim_tb_top/ddr2_dm
2
0
/sim_tb_top/ddr2_dqs
2
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/sim_tb_top/ddr2_dqs_n
2
0
/sim_tb_top/ddr2_ras_n
2
0
/sim_tb_top/ddr2_cas_n
2
0
/sim_tb_top/ddr2_we_n
2
0
/sim_tb_top/ddr2_address
2
0
/sim_tb_top/ddr2_ba
2
0
/sim_tb_top/ddr2_cs_n
2
0
/sim_tb_top/error
2
0
/sim_tb_top/cntrl0_data_valid_out
2
0
/sim_tb_top/init_done
2
0
/sim_tb_top/ddr2_odt
2
0
/sim_tb_top/rst_dqs_div_loop
2
0
SIGPROPS_END