alarm_clock.hier_info

可以调整时间和设置闹钟的数字钟(VHDL)

current_time[1][2] => display_time~17.DATAA
current_time[1][2] => Equal4.IN5
current_time[1][3] => display_time~16.DATAA
current_time[1][3] => Equal4.IN4
current_time[2][0] => display_time~15.DATAA
current_time[2][0] => Equal3.IN7
current_time[2][1] => display_time~14.DATAA
current_time[2][1] => Equal3.IN6
current_time[2][2] => display_time~13.DATAA
current_time[2][2] => Equal3.IN5
current_time[2][3] => display_time~0.DATAA
current_time[2][3] => Equal3.IN4
current_time[3][0] => display_time~1.DATAA
current_time[3][0] => Equal2.IN7
current_time[3][1] => display_time~2.DATAA
current_time[3][1] => Equal2.IN6
current_time[3][2] => display_time~3.DATAA
current_time[3][2] => Equal2.IN5
current_time[3][3] => display_time~4.DATAA
current_time[3][3] => Equal2.IN4
current_time[4][0] => display_time~5.DATAA
current_time[4][0] => Equal1.IN7
current_time[4][1] => display_time~6.DATAA
current_time[4][1] => Equal1.IN6
current_time[4][2] => display_time~7.DATAA
current_time[4][2] => Equal1.IN5
current_time[4][3] => display_time~8.DATAA
current_time[4][3] => Equal1.IN4
current_time[5][0] => display_time~9.DATAA
current_time[5][0] => Equal0.IN7
current_time[5][1] => display_time~10.DATAA
current_time[5][1] => Equal0.IN6
current_time[5][2] => display_time~11.DATAA
current_time[5][2] => Equal0.IN5
current_time[5][3] => display_time~12.DATAA
current_time[5][3] => Equal0.IN4
new_time[0][0] => display_time[0][0].DATAB
new_time[0][1] => display_time[0][1].DATAB
new_time[0][2] => display_time[0][2].DATAB
new_time[0][3] => display_time[0][3].DATAB
new_time[1][0] => display_time[1][0].DATAB
new_time[1][1] => display_time[1][1].DATAB
new_time[1][2] => display_time[1][2].DATAB
new_time[1][3] => display_time[1][3].DATAB
new_time[2][0] => display_time[2][0].DATAB
new_time[2][1] => display_time[2][1].DATAB
new_time[2][2] => display_time[2][2].DATAB
new_time[2][3] => display_time[2][3].DATAB
new_time[3][0] => display_time[3][0].DATAB
new_time[3][1] => display_time[3][1].DATAB
new_time[3][2] => display_time[3][2].DATAB
new_time[3][3] => display_time[3][3].DATAB
new_time[4][0] => display_time[4][0].DATAB
new_time[4][1] => display_time[4][1].DATAB
new_time[4][2] => display_time[4][2].DATAB
new_time[4][3] => display_time[4][3].DATAB
new_time[5][0] => display_time[5][0].DATAB
new_time[5][1] => display_time[5][1].DATAB
new_time[5][2] => display_time[5][2].DATAB
new_time[5][3] => display_time[5][3].DATAB
show_new_time => display_time[0][0].OUTPUTSELECT
show_new_time => display_time[0][1].OUTPUTSELECT
show_new_time => display_time[0][2].OUTPUTSELECT
show_new_time => display_time[0][3].OUTPUTSELECT
show_new_time => display_time[1][0].OUTPUTSELECT
show_new_time => display_time[1][1].OUTPUTSELECT
show_new_time => display_time[1][2].OUTPUTSELECT
show_new_time => display_time[1][3].OUTPUTSELECT
show_new_time => display_time[2][0].OUTPUTSELECT
show_new_time => display_time[2][1].OUTPUTSELECT
show_new_time => display_time[2][2].OUTPUTSELECT
show_new_time => display_time[2][3].OUTPUTSELECT
show_new_time => display_time[3][0].OUTPUTSELECT
show_new_time => display_time[3][1].OUTPUTSELECT
show_new_time => display_time[3][2].OUTPUTSELECT
show_new_time => display_time[3][3].OUTPUTSELECT
show_new_time => display_time[4][0].OUTPUTSELECT
show_new_time => display_time[4][1].OUTPUTSELECT
show_new_time => display_time[4][2].OUTPUTSELECT
show_new_time => display_time[4][3].OUTPUTSELECT
show_new_time => display_time[5][0].OUTPUTSELECT
show_new_time => display_time[5][1].OUTPUTSELECT
show_new_time => display_time[5][2].OUTPUTSELECT
show_new_time => display_time[5][3].OUTPUTSELECT
show_a => display_time~23.OUTPUTSELECT
show_a => display_time~22.OUTPUTSELECT
show_a => display_time~21.OUTPUTSELECT
show_a => display_time~20.OUTPUTSELECT
show_a => display_time~19.OUTPUTSELECT
show_a => display_time~18.OUTPUTSELECT
show_a => display_time~17.OUTPUTSELECT
show_a => display_time~16.OUTPUTSELECT
show_a => display_time~15.OUTPUTSELECT
show_a => display_time~14.OUTPUTSELECT
show_a => display_time~13.OUTPUTSELECT
show_a => display_time~0.OUTPUTSELECT
show_a => display_time~1.OUTPUTSELECT
show_a => display_time~2.OUTPUTSELECT
show_a => display_time~3.OUTPUTSELECT
show_a => display_time~4.OUTPUTSELECT
show_a => display_time~5.OUTPUTSELECT
show_a => display_time~6.OUTPUTSELECT
show_a => display_time~7.OUTPUTSELECT
show_a => display_time~8.OUTPUTSELECT
show_a => display_time~9.OUTPUTSELECT
show_a => display_time~10.OUTPUTSELECT
show_a => display_time~11.OUTPUTSELECT
show_a => display_time~12.OUTPUTSELECT
sound_alarm <= ctrl~4.DB_MAX_OUTPUT_PORT_TYPE
display[0][0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
display[0][1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
display[0][2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
display[0][3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
display[0][4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
display[0][5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
display[0][6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
display[1][0] <= Mux13.DB_MAX_OUTPUT_PORT_TYPE
display[1][1] <= Mux12.DB_MAX_OUTPUT_PORT_TYPE
display[1][2] <= Mux11.DB_MAX_OUTPUT_PORT_TYPE
display[1][3] <= Mux10.DB_MAX_OUTPUT_PORT_TYPE
display[1][4] <= Mux9.DB_MAX_OUTPUT_PORT_TYPE
display[1][5] <= Mux8.DB_MAX_OUTPUT_PORT_TYPE
display[1][6] <= Mux7.DB_MAX_OUTPUT_PORT_TYPE
display[2][0] <= <GND>
display[2][1] <= <GND>
display[2][2] <= <GND>
display[2][3] <= <GND>
display[2][4] <= <GND>
display[2][5] <= <GND>
display[2][6] <= <VCC>
display[3][0] <= Mux20.DB_MAX_OUTPUT_PORT_TYPE
display[3][1] <= Mux19.DB_MAX_OUTPUT_PORT_TYPE
display[3][2] <= Mux18.DB_MAX_OUTPUT_PORT_TYPE
display[3][3] <= Mux17.DB_MAX_OUTPUT_PORT_TYPE
display[3][4] <= Mux16.DB_MAX_OUTPUT_PORT_TYPE
display[3][5] <= Mux15.DB_MAX_OUTPUT_PORT_TYPE
display[3][6] <= Mux14.DB_MAX_OUTPUT_PORT_TYPE
display[4][0] <= Mux27.DB_MAX_OUTPUT_PORT_TYPE
display[4][1] <= Mux26.DB_MAX_OUTPUT_PORT_TYPE
display[4][2] <= Mux25.DB_MAX_OUTPUT_PORT_TYPE
display[4][3] <= Mux24.DB_MAX_OUTPUT_PORT_TYPE
display[4][4] <= Mux23.DB_MAX_OUTPUT_PORT_TYPE
display[4][5] <= Mux22.DB_MAX_OUTPUT_PORT_TYPE
display[4][6] <= Mux21.DB_MAX_OUTPUT_PORT_TYPE
display[5][0] <= <GND>
display[5][1] <= <GND>
display[5][2] <= <GND>
display[5][3] <= <GND>
display[5][4] <= <GND>
display[5][5] <= <GND>
display[5][6] <= <VCC>
display[6][0] <= Mux34.DB_MAX_OUTPUT_PORT_TYPE
display[6][1] <= Mux33.DB_MAX_OUTPUT_PORT_TYPE
display[6][2] <= Mux32.DB_MAX_OUTPUT_PORT_TYPE
display[6][3] <= Mux31.DB_MAX_OUTPUT_PORT_TYPE
display[6][4] <= Mux30.DB_MAX_OUTPUT_PORT_TYPE
display[6][5] <= Mux29.DB_MAX_OUTPUT_PORT_TYPE
display[6][6] <= Mux28.DB_MAX_OUTPUT_PORT_TYPE
display[7][0] <= Mux41.DB_MAX_OUTPUT_PORT_TYPE
display[7][1] <= Mux40.DB_MAX_OUTPUT_PORT_TYPE
display[7][2] <= Mux39.DB_MAX_OUTPUT_PORT_TYPE
display[7][3] <= Mux38.DB_MAX_OUTPUT_PORT_TYPE
display[7][4] <= Mux37.DB_MAX_OUTPUT_PORT_TYPE
display[7][5] <= Mux36.DB_MAX_OUTPUT_PORT_TYPE
display[7][6] <= Mux35.DB_MAX_OUTPUT_PORT_TYPE


|ALARM_CLOCK|fq_divider:u7
clk_in => \divide_clk:cnt[15].CLK
clk_in => \divide_clk:cnt[14].CLK
clk_in => \divide_clk:cnt[13].CLK
clk_in => \divide_clk:cnt[12].CLK
clk_in => \divide_clk:cnt[11].CLK
clk_in => \divide_clk:cnt[10].CLK
clk_in => \divide_clk:cnt[9].CLK
clk_in => \divide_clk:cnt[8].CLK
clk_in => \divide_clk:cnt[7].CLK
clk_in => \divide_clk:cnt[6].CLK
clk_in => \divide_clk:cnt[5].CLK
clk_in => \divide_clk:cnt[4].CLK
clk_in => \divide_clk:cnt[3].CLK
clk_in => \divide_clk:cnt[2].CLK
clk_in => \divide_clk:cnt[1].CLK
clk_in => \divide_clk:cnt[0].CLK
clk_in => clk_out~reg0.CLK
reset => \divide_clk:cnt[15].ACLR
reset => \divide_clk:cnt[14].ACLR
reset => \divide_clk:cnt[13].ACLR
reset => \divide_clk:cnt[12].ACLR
reset => \divide_clk:cnt[11].ACLR
reset => \divide_clk:cnt[10].ACLR
reset => \divide_clk:cnt[9].ACLR
reset => \divide_clk:cnt[8].ACLR
reset => \divide_clk:cnt[7].ACLR
reset => \divide_clk:cnt[6].ACLR
reset => \divide_clk:cnt[5].ACLR
reset => \divide_clk:cnt[4].ACLR
reset => \divide_clk:cnt[3].ACLR
reset => \divide_clk:cnt[2].ACLR
reset => \divide_clk:cnt[1].ACLR
reset => \divide_clk:cnt[0].ACLR
reset => clk_out~reg0.ACLR
clk_out <= clk_out~reg0.DB_MAX_OUTPUT_PORT_TYPE


|ALARM_CLOCK|led_display:U8
displayseg[0][0] => Mux6.IN7
displayseg[0][1] => Mux5.IN7
displayseg[0][2] => Mux4.IN7
displayseg[0][3] => Mux3.IN7
displayseg[0][4] => Mux2.IN7
displayseg[0][5] => Mux1.IN7
displayseg[0][6] => Mux0.IN7
displayseg[1][0] => Mux6.IN6
displayseg[1][1] => Mux5.IN6
displayseg[1][2] => Mux4.IN6
displayseg[1][3] => Mux3.IN6
displayseg[1][4] => Mux2.IN6
displayseg[1][5] => Mux1.IN6
displayseg[1][6] => Mux0.IN6
displayseg[2][0] => Mux6.IN5
displayseg[2][1] => Mux5.IN5
displayseg[2][2] => Mux4.IN5
displayseg[2][3] => Mux3.IN5
displayseg[2][4] => Mux2.IN5
displayseg[2][5] => Mux1.IN5
displayseg[2][6] => Mux0.IN5
displayseg[3][0] => Mux6.IN4
displayseg[3][1] => Mux5.IN4
displayseg[3][2] => Mux4.IN4
displayseg[3][3] => Mux3.IN4
displayseg[3][4] => Mux2.IN4
displayseg[3][5] => Mux1.IN4
displayseg[3][6] => Mux0.IN4
displayseg[4][0] => Mux6.IN3
displayseg[4][1] => Mux5.IN3
displayseg[4][2] => Mux4.IN3
displayseg[4][3] => Mux3.IN3
displayseg[4][4] => Mux2.IN3
displayseg[4][5] => Mux1.IN3
displayseg[4][6] => Mux0.IN3
displayseg[5][0] => Mux6.IN2
displayseg[5][1] => Mux5.IN2
displayseg[5][2] => Mux4.IN2
displayseg[5][3] => Mux3.IN2
displayseg[5][4] => Mux2.IN2
displayseg[5][5] => Mux1.IN2
displayseg[5][6] => Mux0.IN2
displayseg[6][0] => Mux6.IN1
displayseg[6][1] => Mux5.IN1
displayseg[6][2] => Mux4.IN1
displayseg[6][3] => Mux3.IN1
displayseg[6][4] => Mux2.IN1
displayseg[6][5] => Mux1.IN1
displayseg[6][6] => Mux0.IN1
displayseg[7][0] => Mux6.IN0
displayseg[7][1] => Mux5.IN0
displayseg[7][2] => Mux4.IN0
displayseg[7][3] => Mux3.IN0
displayseg[7][4] => Mux2.IN0
displayseg[7][5] => Mux1.IN0
displayseg[7][6] => Mux0.IN0
clk => clock_out[6]~reg0.CLK
clk => clock_out[5]~reg0.CLK
clk => clock_out[4]~reg0.CLK
clk => clock_out[3]~reg0.CLK
clk => clock_out[2]~reg0.CLK
clk => clock_out[1]~reg0.CLK
clk => clock_out[0]~reg0.CLK
clk => cnt8[2].CLK
clk => cnt8[1].CLK
clk => cnt8[0].CLK
clock_out[0] <= clock_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
clock_out[1] <= clock_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
clock_out[2] <= clock_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
clock_out[3] <= clock_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
clock_out[4] <= clock_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
clock_out[5] <= clock_out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
clock_out[6] <= clock_out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE