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📄 alarm_clock.map.rpt

📁 可以调整时间和设置闹钟的数字钟(VHDL)
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;     -- arithmetic mode                      ; 46    ;
;     -- qfbk mode                            ; 0     ;
;     -- register cascade mode                ; 0     ;
;     -- synchronous clear/load mode          ; 16    ;
;     -- asynchronous clear/load mode         ; 128   ;
;                                             ;       ;
; Total registers                             ; 138   ;
; Total logic cells in carry chains           ; 50    ;
; I/O pins                                    ; 23    ;
; Maximum fan-out node                        ; reset ;
; Maximum fan-out                             ; 95    ;
; Total fan-out                               ; 1425  ;
; Average fan-out                             ; 3.85  ;
+---------------------------------------------+-------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                ;
+----------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+----------------------------------+--------------+
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name              ; Library Name ;
+----------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+----------------------------------+--------------+
; |alarm_clock               ; 347 (0)     ; 138          ; 0           ; 23   ; 0            ; 209 (0)      ; 59 (0)            ; 79 (0)           ; 50 (0)          ; 0 (0)      ; |alarm_clock                     ; work         ;
;    |alarm_controller:u3|   ; 61 (61)     ; 39           ; 0           ; 0    ; 0            ; 22 (22)      ; 3 (3)             ; 36 (36)          ; 30 (30)         ; 0 (0)      ; |alarm_clock|alarm_controller:u3 ; work         ;
;    |alarm_counter:u4|      ; 60 (60)     ; 24           ; 0           ; 0    ; 0            ; 36 (36)      ; 12 (12)           ; 12 (12)          ; 4 (4)           ; 0 (0)      ; |alarm_clock|alarm_counter:u4    ; work         ;
;    |alarm_reg:u5|          ; 24 (24)     ; 24           ; 0           ; 0    ; 0            ; 0 (0)        ; 24 (24)           ; 0 (0)            ; 0 (0)           ; 0 (0)      ; |alarm_clock|alarm_reg:u5        ; work         ;
;    |decoder:u1|            ; 10 (10)     ; 0            ; 0           ; 0    ; 0            ; 10 (10)      ; 0 (0)             ; 0 (0)            ; 0 (0)           ; 0 (0)      ; |alarm_clock|decoder:u1          ; work         ;
;    |display_driver:u6|     ; 100 (100)   ; 0            ; 0           ; 0    ; 0            ; 100 (100)    ; 0 (0)             ; 0 (0)            ; 0 (0)           ; 0 (0)      ; |alarm_clock|display_driver:u6   ; work         ;
;    |fq_divider:u7|         ; 26 (26)     ; 17           ; 0           ; 0    ; 0            ; 9 (9)        ; 0 (0)             ; 17 (17)          ; 16 (16)         ; 0 (0)      ; |alarm_clock|fq_divider:u7       ; work         ;
;    |key_buffer:u2|         ; 24 (24)     ; 24           ; 0           ; 0    ; 0            ; 0 (0)        ; 20 (20)           ; 4 (4)            ; 0 (0)           ; 0 (0)      ; |alarm_clock|key_buffer:u2       ; work         ;
;    |led_display:U8|        ; 42 (42)     ; 10           ; 0           ; 0    ; 0            ; 32 (32)      ; 0 (0)             ; 10 (10)          ; 0 (0)           ; 0 (0)      ; |alarm_clock|led_display:U8      ; work         ;
+----------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+----------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


Encoding Type:  One-Hot
+-----------------------------------------------------------------------------------------------+
; State Machine - |alarm_clock|alarm_controller:u3|curr_state                                   ;
+---------------+---------------+---------------+---------------+---------------+---------------+
; Name          ; curr_state.s4 ; curr_state.s3 ; curr_state.s2 ; curr_state.s1 ; curr_state.s0 ;
+---------------+---------------+---------------+---------------+---------------+---------------+
; curr_state.s0 ; 0             ; 0             ; 0             ; 0             ; 0             ;
; curr_state.s1 ; 0             ; 0             ; 0             ; 1             ; 1             ;
; curr_state.s2 ; 0             ; 0             ; 1             ; 0             ; 1             ;
; curr_state.s3 ; 0             ; 1             ; 0             ; 0             ; 1             ;
; curr_state.s4 ; 1             ; 0             ; 0             ; 0             ; 1             ;
+---------------+---------------+---------------+---------------+---------------+---------------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 138   ;
; Number of registers using Synchronous Clear  ; 16    ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 128   ;
; Number of registers using Asynchronous Load  ; 24    ;
; Number of registers using Clock Enable       ; 70    ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                                   ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output                         ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------------------------------+
; 3:1                ; 16 bits   ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; Yes        ; |alarm_clock|fq_divider:u7|\divide_clk:cnt[9]      ;
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |alarm_clock|alarm_counter:u4|i_current_time[5][0] ;
; 4:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |alarm_clock|alarm_counter:u4|i_current_time[4][2] ;
; 3:1                ; 24 bits   ; 48 LEs        ; 48 LEs               ; 0 LEs                  ; No         ; |alarm_clock|display_driver:u6|display_time[5][3]  ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------------------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.1 Build 156 04/30/2007 SJ Full Version
    Info: Processing started: Tue May 13 23:39:16 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ALARM_CLOCK -c ALARM_CLOCK
Info: Found 2 design units, including 1 entities, in source file ALARM_CLOCK.vhd
    Info: Found design unit 1: alarm_clock-art
    Info: Found entity 1: alarm_clock
Info: Found 2 design units, including 1 entities, in source file ALARM_CONTROLLER.vhd
    Info: Found design unit 1: alarm_controller-art
    Info: Found entity 1: alarm_controller
Info: Found 2 design units, including 1 entities, in source file DECODER.vhd
    Info: Found design unit 1: decoder-art
    Info: Found entity 1: decoder
Info: Found 2 design units, including 1 entities, in source file ALARM_COUNTER.vhd
    Info: Found design unit 1: alarm_counter-art
    Info: Found entity 1: alarm_counter
Info: Found 2 design units, including 1 entities, in source file ALARM_REG.vhd
    Info: Found design unit 1: alarm_reg-art
    Info: Found entity 1: alarm_reg
Info: Found 2 design units, including 1 entities, in source file DISPLAY_DRIVER.vhd
    Info: Found design unit 1: display_driver-art
    Info: Found entity 1: display_driver
Info: Found 2 design units, including 1 entities, in source file FQ_DIVIDER.vhd
    Info: Found design unit 1: fq_divider-art
    Info: Found entity 1: fq_divider
Info: Found 1 design units, including 0 entities, in source file P_ALARM.vhd
    Info: Found design unit 1: p_alarm
Info: Found 2 design units, including 1 entities, in source file key_buffer.vhd
    Info: Found design unit 1: key_buffer-art
    Info: Found entity 1: key_buffer
Info: Found 2 design units, including 1 entities, in source file led_display.vhd
    Info: Found design unit 1: led_display-led_display_arch
    Info: Found entity 1: led_display
Info: Elaborating entity "ALARM_CLOCK" for the top level hierarchy
Info: Elaborating entity "decoder" for hierarchy "decoder:u1"
Info: Elaborating entity "key_buffer" for hierarchy "key_buffer:u2"
Info: Elaborating entity "alarm_controller" for hierarchy "alarm_controller:u3"
Info: Elaborating entity "alarm_counter" for hierarchy "alarm_counter:u4"
Info: Elaborating entity "alarm_reg" for hierarchy "alarm_reg:u5"
Info: Elaborating entity "display_driver" for hierarchy "display_driver:u6"
Warning (10631): VHDL Process Statement warning at DISPLAY_DRIVER.vhd(18): inferring latch(es) for signal or variable "display_time", which holds its previous value in one or more paths through the process
Info: Elaborating entity "fq_divider" for hierarchy "fq_divider:u7"
Info: Elaborating entity "led_display" for hierarchy "led_display:U8"
Warning (10492): VHDL Process Statement warning at led_display.vhd(21): signal "displayseg" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at led_display.vhd(22): signal "displayseg" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at led_display.vhd(23): signal "displayseg" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at led_display.vhd(24): signal "displayseg" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at led_display.vhd(25): signal "displayseg" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at led_display.vhd(26): signal "displayseg" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at led_display.vhd(27): signal "displayseg" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at led_display.vhd(28): signal "displayseg" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Info: State machine "|alarm_clock|alarm_controller:u3|curr_state" contains 5 states
Info: Selected Auto state machine encoding method for state machine "|alarm_clock|alarm_controller:u3|curr_state"
Info: Encoding result for state machine "|alarm_clock|alarm_controller:u3|curr_state"
    Info: Completed encoding using 5 state bits
        Info: Encoded state bit "alarm_controller:u3|curr_state.s4"
        Info: Encoded state bit "alarm_controller:u3|curr_state.s3"
        Info: Encoded state bit "alarm_controller:u3|curr_state.s2"
        Info: Encoded state bit "alarm_controller:u3|curr_state.s1"
        Info: Encoded state bit "alarm_controller:u3|curr_state.s0"
    Info: State "|alarm_clock|alarm_controller:u3|curr_state.s0" uses code string "00000"
    Info: State "|alarm_clock|alarm_controller:u3|curr_state.s1" uses code string "00011"
    Info: State "|alarm_clock|alarm_controller:u3|curr_state.s2" uses code string "00101"
    Info: State "|alarm_clock|alarm_controller:u3|curr_state.s3" uses code string "01001"
    Info: State "|alarm_clock|alarm_controller:u3|curr_state.s4" uses code string "10001"
Info: Implemented 370 device resources after synthesis - the final resource count might be different
    Info: Implemented 15 input pins
    Info: Implemented 8 output pins
    Info: Implemented 347 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 9 warnings
    Info: Allocated 156 megabytes of memory during processing
    Info: Processing ended: Tue May 13 23:39:30 2008
    Info: Elapsed time: 00:00:14


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