spi_master.map.smsg

AN485_CH-MAX II CPLD 中的串行外设接口主机（verilog SPI）

Warning (10268): Verilog HDL information at SPI_Master.v(62): Always Construct contains both blocking and non-blocking assignments
Warning (10273): Verilog HDL warning at SPI_Master.v(145): extended using "x" or "z"