dds.map.eqn

直接数字频率合成器

--G1_q[9] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[9]
G1_q[9]_clock_0 = clk;
G1_q[9]_write_address = WR_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[9]_read_address = RD_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[9] = MEMORY_SEGMENT(, , G1_q[9]_clock_0, , , , , , G1_q[9]_write_address, G1_q[9]_read_address);


--G1_q[8] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[8]
G1_q[8]_clock_0 = clk;
G1_q[8]_write_address = WR_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[8]_read_address = RD_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[8] = MEMORY_SEGMENT(, , G1_q[8]_clock_0, , , , , , G1_q[8]_write_address, G1_q[8]_read_address);


--G1_q[7] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[7]
G1_q[7]_clock_0 = clk;
G1_q[7]_write_address = WR_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[7]_read_address = RD_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[7] = MEMORY_SEGMENT(, , G1_q[7]_clock_0, , , , , , G1_q[7]_write_address, G1_q[7]_read_address);


--G1_q[6] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[6]
G1_q[6]_clock_0 = clk;
G1_q[6]_write_address = WR_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[6]_read_address = RD_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[6] = MEMORY_SEGMENT(, , G1_q[6]_clock_0, , , , , , G1_q[6]_write_address, G1_q[6]_read_address);


--G1_q[5] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[5]
G1_q[5]_clock_0 = clk;
G1_q[5]_write_address = WR_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[5]_read_address = RD_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[5] = MEMORY_SEGMENT(, , G1_q[5]_clock_0, , , , , , G1_q[5]_write_address, G1_q[5]_read_address);


--G1_q[4] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[4]
G1_q[4]_clock_0 = clk;
G1_q[4]_write_address = WR_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[4]_read_address = RD_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[4] = MEMORY_SEGMENT(, , G1_q[4]_clock_0, , , , , , G1_q[4]_write_address, G1_q[4]_read_address);


--G1_q[3] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[3]
G1_q[3]_clock_0 = clk;
G1_q[3]_write_address = WR_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[3]_read_address = RD_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[3] = MEMORY_SEGMENT(, , G1_q[3]_clock_0, , , , , , G1_q[3]_write_address, G1_q[3]_read_address);


--G1_q[2] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[2]
G1_q[2]_clock_0 = clk;
G1_q[2]_write_address = WR_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[2]_read_address = RD_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[2] = MEMORY_SEGMENT(, , G1_q[2]_clock_0, , , , , , G1_q[2]_write_address, G1_q[2]_read_address);


--G1_q[1] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[1]
G1_q[1]_clock_0 = clk;
G1_q[1]_write_address = WR_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[1]_read_address = RD_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[1] = MEMORY_SEGMENT(, , G1_q[1]_clock_0, , , , , , G1_q[1]_write_address, G1_q[1]_read_address);


--G1_q[0] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[0]
G1_q[0]_clock_0 = clk;
G1_q[0]_write_address = WR_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[0]_read_address = RD_ADDR(L3_cs_buffer[0], L3_cs_buffer[1], L3_cs_buffer[2], L3_cs_buffer[3], L3_cs_buffer[4], L3_cs_buffer[5], L3_cs_buffer[6], L3_cs_buffer[7], J1_unreg_res_node[8]);
G1_q[0] = MEMORY_SEGMENT(, , G1_q[0]_clock_0, , , , , , G1_q[0]_write_address, G1_q[0]_read_address);


--L3_cs_buffer[0] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]
--operation mode is arithmetic

L3_cs_buffer[0] = E1_dffs[0] $ phase[0];

--L3_cout[0] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

L3_cout[0] = CARRY(E1_dffs[0] & phase[0]);


--L3_cs_buffer[1] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

L3_cs_buffer[1] = phase[1] $ E1_dffs[1] $ L3_cout[0];

--L3_cout[1] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

L3_cout[1] = CARRY(phase[1] & E1_dffs[1] # L3_cout[0] # !phase[1] & E1_dffs[1] & L3_cout[0]);


--L3_cs_buffer[2] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

L3_cs_buffer[2] = phase[2] $ E1_dffs[2] $ L3_cout[1];

--L3_cout[2] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

L3_cout[2] = CARRY(phase[2] & E1_dffs[2] # L3_cout[1] # !phase[2] & E1_dffs[2] & L3_cout[1]);


--L3_cs_buffer[3] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

L3_cs_buffer[3] = phase[3] $ E1_dffs[3] $ L3_cout[2];

--L3_cout[3] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

L3_cout[3] = CARRY(phase[3] & E1_dffs[3] # L3_cout[2] # !phase[3] & E1_dffs[3] & L3_cout[2]);


--L3_cs_buffer[4] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

L3_cs_buffer[4] = phase[4] $ E1_dffs[4] $ L3_cout[3];

--L3_cout[4] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

L3_cout[4] = CARRY(phase[4] & E1_dffs[4] # L3_cout[3] # !phase[4] & E1_dffs[4] & L3_cout[3]);


--L3_cs_buffer[5] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

L3_cs_buffer[5] = phase[5] $ E1_dffs[5] $ L3_cout[4];

--L3_cout[5] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

L3_cout[5] = CARRY(phase[5] & E1_dffs[5] # L3_cout[4] # !phase[5] & E1_dffs[5] & L3_cout[4]);


--L3_cs_buffer[6] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]
--operation mode is arithmetic

L3_cs_buffer[6] = phase[6] $ E1_dffs[6] $ L3_cout[5];

--L3_cout[6] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[6]
--operation mode is arithmetic

L3_cout[6] = CARRY(phase[6] & E1_dffs[6] # L3_cout[5] # !phase[6] & E1_dffs[6] & L3_cout[5]);


--L3_cs_buffer[7] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]
--operation mode is arithmetic

L3_cs_buffer[7] = phase[7] $ E1_dffs[7] $ L3_cout[6];

--L3_cout[7] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[7]
--operation mode is arithmetic

L3_cout[7] = CARRY(phase[7] & E1_dffs[7] # L3_cout[6] # !phase[7] & E1_dffs[7] & L3_cout[6]);


--E1_dffs[8] is lpm_dff1:inst|lpm_ff:lpm_ff_component|dffs[8]
--operation mode is normal

E1_dffs[8]_lut_out = J2_unreg_res_node[8];
E1_dffs[8] = DFFEA(E1_dffs[8]_lut_out, clk, , , , , );


--J1_unreg_res_node[8] is lpm_add_sub0:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder|unreg_res_node[8]
--operation mode is normal

J1_unreg_res_node[8] = phase[8] $ E1_dffs[8] $ L3_cout[7];


--E1_dffs[0] is lpm_dff1:inst|lpm_ff:lpm_ff_component|dffs[0]
--operation mode is normal

E1_dffs[0]_lut_out = L6_cs_buffer[0];
E1_dffs[0] = DFFEA(E1_dffs[0]_lut_out, clk, , , , , );


--E1_dffs[1] is lpm_dff1:inst|lpm_ff:lpm_ff_component|dffs[1]
--operation mode is normal

E1_dffs[1]_lut_out = L6_cs_buffer[1];
E1_dffs[1] = DFFEA(E1_dffs[1]_lut_out, clk, , , , , );


--E1_dffs[2] is lpm_dff1:inst|lpm_ff:lpm_ff_component|dffs[2]
--operation mode is normal

E1_dffs[2]_lut_out = L6_cs_buffer[2];
E1_dffs[2] = DFFEA(E1_dffs[2]_lut_out, clk, , , , , );


--E1_dffs[3] is lpm_dff1:inst|lpm_ff:lpm_ff_component|dffs[3]
--operation mode is normal

E1_dffs[3]_lut_out = L6_cs_buffer[3];
E1_dffs[3] = DFFEA(E1_dffs[3]_lut_out, clk, , , , , );


--E1_dffs[4] is lpm_dff1:inst|lpm_ff:lpm_ff_component|dffs[4]
--operation mode is normal

E1_dffs[4]_lut_out = L6_cs_buffer[4];
E1_dffs[4] = DFFEA(E1_dffs[4]_lut_out, clk, , , , , );


--E1_dffs[5] is lpm_dff1:inst|lpm_ff:lpm_ff_component|dffs[5]
--operation mode is normal

E1_dffs[5]_lut_out = L6_cs_buffer[5];
E1_dffs[5] = DFFEA(E1_dffs[5]_lut_out, clk, , , , , );


--E1_dffs[6] is lpm_dff1:inst|lpm_ff:lpm_ff_component|dffs[6]
--operation mode is normal

E1_dffs[6]_lut_out = L6_cs_buffer[6];
E1_dffs[6] = DFFEA(E1_dffs[6]_lut_out, clk, , , , , );


--E1_dffs[7] is lpm_dff1:inst|lpm_ff:lpm_ff_component|dffs[7]
--operation mode is normal

E1_dffs[7]_lut_out = L6_cs_buffer[7];
E1_dffs[7] = DFFEA(E1_dffs[7]_lut_out, clk, , , , , );


--L6_cs_buffer[0] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]
--operation mode is arithmetic

L6_cs_buffer[0] = E1_dffs[0] $ freword[0];

--L6_cout[0] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

L6_cout[0] = CARRY(E1_dffs[0] & freword[0]);


--L6_cs_buffer[1] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

L6_cs_buffer[1] = freword[1] $ E1_dffs[1] $ L6_cout[0];

--L6_cout[1] is lpm_add_sub0:inst6|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

L6_cout[1] = CARRY(freword[1] & E1_dffs[1] # L6_cout[0] # !freword[1] & E1_dffs[1] & L6_cout[0]);