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基于FPGA的机器人视频监视系统

<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890002.pdf" target="mainFrame">1.1课题背景</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890004.pdf" target="mainFrame">1.2国内外研究现状</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890005.pdf" target="mainFrame">1.3本课题的主要工作</a><br>

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<img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out3" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890006.pdf" target="mainFrame">第二章系统设计框架及视频采集、变换和显示格式设计</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890007.pdf" target="mainFrame">2.1视频监控系统结构及其实现方案</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890008.pdf" target="mainFrame">2.2视频输入设备摄像头工作方式</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out33" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890009.pdf" target="mainFrame">2.3 ITU-656标准的分析</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890009.pdf" target="mainFrame">2.3.1接口的一般描述结构</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890009.pdf" target="mainFrame">2.3.2视频数据</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890012.pdf" target="mainFrame">2.3.3接口信号结构</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890013.pdf" target="mainFrame">2.3.4视频定时基准码(SAV，EAV)</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890014.pdf" target="mainFrame">2.3.5辅助数据</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890014.pdf" target="mainFrame">2.3.6消隐期间的数据字</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out34" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890014.pdf" target="mainFrame">2.4显示器信号的组成和扫描原理</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890017.pdf" target="mainFrame">2.4.1显示器信号组成</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890018.pdf" target="mainFrame">2.4.2显示器时序及其扫描原理</a><br>

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<img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out4" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890019.pdf" target="mainFrame">第三章FPGA开发技术和硬件选型</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out41" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890019.pdf" target="mainFrame">3.1可编程逻辑设计技术简介</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890021.pdf" target="mainFrame">3.1.1可编程逻辑器件的分类及发展趋势</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890022.pdf" target="mainFrame">3.1.2 FPGA的主要特点</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890023.pdf" target="mainFrame">3.2 FPGA的设计原则和流程</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out43" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890024.pdf" target="mainFrame">3.3硬件描述语言(HDL)</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890025.pdf" target="mainFrame">3.3.1 VERILOG HDL的发展</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890026.pdf" target="mainFrame">3.3.2 VERILOG HDL自顶向下的设计方法</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out44" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890027.pdf" target="mainFrame">3.4课题中FPGA的软硬件开发平台</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890028.pdf" target="mainFrame">3.4.1本课题FPGA芯片选型</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890029.pdf" target="mainFrame">3.4.2视频输入硬件设计</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890030.pdf" target="mainFrame">3.4.3视频输出硬件设计</a><br>

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<img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out5" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890031.pdf" target="mainFrame">第四章FPGA视频采集预处理系统设计与实现</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890032.pdf" target="mainFrame">4.1 FPGA系统功能框图和整体设计</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out52" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890033.pdf" target="mainFrame">4.2 FIFO先进先出模块设计</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890034.pdf" target="mainFrame">4.2.1异步时钟域的解决方法</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890035.pdf" target="mainFrame">4.2.2异步FIFO的FPGA实现</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890036.pdf" target="mainFrame">4.2.3 SAA7113与异步FIFO的接口设计</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out53" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890037.pdf" target="mainFrame">4.3 I2C控制器设计</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890038.pdf" target="mainFrame">4.3.1 I2C总线</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890039.pdf" target="mainFrame">4.3.2 I2C状态机描述</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890040.pdf" target="mainFrame">4.3.3命令状态机</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890041.pdf" target="mainFrame">4.3.4时序状态机</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out54" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890042.pdf" target="mainFrame">4.4图象帧存控制模块实现</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890043.pdf" target="mainFrame">4.4.1 SDRAM控制器的总体设计</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890044.pdf" target="mainFrame">4.4.2系统控制接口模块</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890045.pdf" target="mainFrame">4.4.3 CMD命令解析模块</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890046.pdf" target="mainFrame">4.4.4命令响应模块</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890047.pdf" target="mainFrame">4.4.5数据通路模块</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890048.pdf" target="mainFrame">4.4.6帧存乒乓机制</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/ofolder.gif" ID="Out55" CLASS="Outline" STYLE="cursor:hand"><a href="y11586890049.pdf" target="mainFrame">4.5 VGA显示控制模块</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890050.pdf" target="mainFrame">4.5.1 VGA时序信号产生模块</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890051.pdf" target="mainFrame">4.5.2 YCRCB与RGB彩色空间变换</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/I.gif"><img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890052.pdf" target="mainFrame">4.5.3 YCBCR(→)RGB变换器设计实例</a><br>

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<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890053.pdf" target="mainFrame">4.6优化设计</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890054.pdf" target="mainFrame">4.7系统实验结果</a><br>

<img SRC="../../images/I.gif"><img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890055.pdf" target="mainFrame">4.8本章小结</a><br>

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<img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890056.pdf" target="mainFrame">总结与展望</a><br>

<img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890057.pdf" target="mainFrame">参考文献</a><br>

<img SRC="../../images/H.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890058.pdf" target="mainFrame">致谢</a><br>

<img SRC="../../images/L.gif"><img SRC="../../images/nfolder.gif"><a href="y11586890059.pdf" target="mainFrame">攻读学位期间发表的学术论文目录</a><br>

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