alu3.map.summary

来自「用verilog语言编写」· SUMMARY 代码 · 共 9 行

Analysis & Synthesis Status : Successful - Sun May 27 15:22:39 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : alu3
Top-level Entity Name : alu3
Family : FLEX10K
Total logic elements : 52
Total pins : 28
Total memory bits : 0