add2.map.summary

两个4bit超前进位加法器实现8bit加法器

Analysis & Synthesis Status : Successful - Sun May 27 13:28:00 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : add2
Top-level Entity Name : add2
Family : FLEX10K
Total logic elements : 9
Total pins : 25
Total memory bits : 0